Background:
Wasm EH, while using Windows EH (catchpad/cleanuppad based) IR, uses
Itanium-based libraries and ABIs with some modifications.
`__clang_call_terminate` is a wrapper generated in Clang's Itanium C++
ABI implementation. It contains this code, in C-style pseudocode:
```
void __clang_call_terminate(void *exn) {
__cxa_begin_catch(exn);
std::terminate();
}
```
So this function is a wrapper to call `__cxa_begin_catch` on the
exception pointer before termination.
In Itanium ABI, this function is called when another exception is thrown
while processing an exception. The pointer for this second, violating
exception is passed as the argument of this `__clang_call_terminate`,
which calls `__cxa_begin_catch` with that pointer and calls
`std::terminate` to terminate the program.
The spec (https://libcxxabi.llvm.org/spec.html) for `__cxa_begin_catch`
says,
```
When the personality routine encounters a termination condition, it
will call __cxa_begin_catch() to mark the exception as handled and then
call terminate(), which shall not return to its caller.
```
In wasm EH's Clang implementation, this function is called from
cleanuppads that terminates the program, which we also call terminate
pads. Cleanuppads normally don't access the thrown exception and the
wasm backend converts them to `catch_all` blocks. But because we need
the exception pointer in this cleanuppad, we generate
`wasm.get.exception` intrinsic (which will eventually be lowered to
`catch` instruction) as we do in the catchpads. But because terminate
pads are cleanup pads and should run even when a foreign exception is
thrown, so what we have been doing is:
1. In `WebAssemblyLateEHPrepare::ensureSingleBBTermPads()`, we make sure
terminate pads are in this simple shape:
```
%exn = catch
call @__clang_call_terminate(%exn)
unreachable
```
2. In `WebAssemblyHandleEHTerminatePads` pass at the end of the
pipeline, we attach a `catch_all` to terminate pads, so they will be in
this form:
```
%exn = catch
call @__clang_call_terminate(%exn)
unreachable
catch_all
call @std::terminate()
unreachable
```
In `catch_all` part, we don't have the exception pointer, so we call
`std::terminate()` directly. The reason we ran HandleEHTerminatePads at
the end of the pipeline, separate from LateEHPrepare, was it was
convenient to assume there was only a single `catch` part per `try`
during CFGSort and CFGStackify.
---
Problem:
While it thinks terminate pads could have been possibly split or calls
to `__clang_call_terminate` could have been duplicated,
`WebAssemblyLateEHPrepare::ensureSingleBBTermPads()` assumes terminate
pads contain no more than calls to `__clang_call_terminate` and
`unreachable` instruction. I assumed that because in LLVM very limited
forms of transformations are done to catchpads and cleanuppads to
maintain the scoping structure. But it turned out to be incorrect;
passes can merge cleanuppads into one, including terminate pads, as long
as the new code has a correct scoping structure. One pass that does this
I observed was `SimplifyCFG`, but there can be more. After this
transformation, a single cleanuppad can contain any number of other
instructions with the call to `__clang_call_terminate` and can span many
BBs. It wouldn't be practical to duplicate all these BBs within the
cleanuppad to generate the equivalent `catch_all` blocks, only with
calls to `__clang_call_terminate` replaced by calls to `std::terminate`.
Unless we do more complicated transformation to split those calls to
`__clang_call_terminate` into a separate cleanuppad, it is tricky to
solve.
---
Solution (?):
This CL just disables the generation and use of `__clang_call_terminate`
and calls `std::terminate()` directly in its place.
The possible downside of this approach can be, because the Itanium ABI
intended to "mark" the violating exception handled, we don't do that
anymore. What `__cxa_begin_catch` actually does is increment the
exception's handler count and decrement the uncaught exception count,
which in my opinion do not matter much given that we are about to
terminate the program anyway. Also it does not affect info like stack
traces that can be possibly shown to developers.
And while we use a variant of Itanium EH ABI, we can make some
deviations if we choose to; we are already different in that in the
current version of the EH spec we don't support two-phase unwinding. We
can possibly consider a more complicated transformation later to
reenable this, but I don't think that has high priority.
Changes in this CL contains:
- In Clang, we don't generate a call to `wasm.get.exception()` intrinsic
and `__clang_call_terminate` function in terminate pads anymore; we
simply generate calls to `std::terminate()`, which is the default
implementation of `CGCXXABI::emitTerminateForUnexpectedException`.
- Remove `WebAssembly::ensureSingleBBTermPads() function and
`WebAssemblyHandleEHTerminatePads` pass, because terminate pads are
already `catch_all` now (because they don't need the exception
pointer) and we don't need these transformations anymore.
- Change tests to use `std::terminate` directly. Also removes tests that
tested `LateEHPrepare::ensureSingleBBTermPads` and
`HandleEHTerminatePads` pass.
- Drive-by fix: Add some function attributes to EH intrinsic
declarations
Fixes https://github.com/emscripten-core/emscripten/issues/13582.
Reviewed By: dschuff, tlively
Differential Revision: https://reviews.llvm.org/D97834
527 lines
19 KiB
C++
527 lines
19 KiB
C++
//===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file defines the WebAssembly-specific subclass of TargetMachine.
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///
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//===----------------------------------------------------------------------===//
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#include "WebAssemblyTargetMachine.h"
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "TargetInfo/WebAssemblyTargetInfo.h"
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#include "WebAssembly.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblyTargetObjectFile.h"
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#include "WebAssemblyTargetTransformInfo.h"
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#include "llvm/CodeGen/MIRParser/MIParser.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/RegAllocRegistry.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Transforms/Scalar.h"
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#include "llvm/Transforms/Scalar/LowerAtomic.h"
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#include "llvm/Transforms/Utils.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm"
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// Emscripten's asm.js-style exception handling
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cl::opt<bool> EnableEmException(
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"enable-emscripten-cxx-exceptions",
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cl::desc("WebAssembly Emscripten-style exception handling"),
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cl::init(false));
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// Emscripten's asm.js-style setjmp/longjmp handling
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cl::opt<bool> EnableEmSjLj(
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"enable-emscripten-sjlj",
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cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"),
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cl::init(false));
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// A command-line option to keep implicit locals
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// for the purpose of testing with lit/llc ONLY.
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// This produces output which is not valid WebAssembly, and is not supported
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// by assemblers/disassemblers and other MC based tools.
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static cl::opt<bool> WasmDisableExplicitLocals(
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"wasm-disable-explicit-locals", cl::Hidden,
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cl::desc("WebAssembly: output implicit locals in"
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" instruction output for test purposes only."),
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cl::init(false));
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget() {
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// Register the target.
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RegisterTargetMachine<WebAssemblyTargetMachine> X(
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getTheWebAssemblyTarget32());
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RegisterTargetMachine<WebAssemblyTargetMachine> Y(
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getTheWebAssemblyTarget64());
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// Register backend passes
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auto &PR = *PassRegistry::getPassRegistry();
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initializeWebAssemblyAddMissingPrototypesPass(PR);
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initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR);
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initializeLowerGlobalDtorsPass(PR);
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initializeFixFunctionBitcastsPass(PR);
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initializeOptimizeReturnedPass(PR);
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initializeWebAssemblyArgumentMovePass(PR);
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initializeWebAssemblySetP2AlignOperandsPass(PR);
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initializeWebAssemblyReplacePhysRegsPass(PR);
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initializeWebAssemblyPrepareForLiveIntervalsPass(PR);
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initializeWebAssemblyOptimizeLiveIntervalsPass(PR);
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initializeWebAssemblyMemIntrinsicResultsPass(PR);
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initializeWebAssemblyRegStackifyPass(PR);
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initializeWebAssemblyRegColoringPass(PR);
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initializeWebAssemblyFixIrreducibleControlFlowPass(PR);
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initializeWebAssemblyLateEHPreparePass(PR);
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initializeWebAssemblyExceptionInfoPass(PR);
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initializeWebAssemblyCFGSortPass(PR);
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initializeWebAssemblyCFGStackifyPass(PR);
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initializeWebAssemblyExplicitLocalsPass(PR);
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initializeWebAssemblyLowerBrUnlessPass(PR);
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initializeWebAssemblyRegNumberingPass(PR);
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initializeWebAssemblyDebugFixupPass(PR);
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initializeWebAssemblyPeepholePass(PR);
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}
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//===----------------------------------------------------------------------===//
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// WebAssembly Lowering public interface.
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//===----------------------------------------------------------------------===//
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static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM,
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const Triple &TT) {
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if (!RM.hasValue()) {
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// Default to static relocation model. This should always be more optimial
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// than PIC since the static linker can determine all global addresses and
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// assume direct function calls.
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return Reloc::Static;
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}
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if (!TT.isOSEmscripten()) {
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// Relocation modes other than static are currently implemented in a way
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// that only works for Emscripten, so disable them if we aren't targeting
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// Emscripten.
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return Reloc::Static;
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}
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return *RM;
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}
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/// Create an WebAssembly architecture model.
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///
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WebAssemblyTargetMachine::WebAssemblyTargetMachine(
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const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
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const TargetOptions &Options, Optional<Reloc::Model> RM,
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Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
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: LLVMTargetMachine(T,
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TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128"
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: "e-m:e-p:32:32-i64:64-n32:64-S128",
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TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT),
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getEffectiveCodeModel(CM, CodeModel::Large), OL),
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TLOF(new WebAssemblyTargetObjectFile()) {
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// WebAssembly type-checks instructions, but a noreturn function with a return
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// type that doesn't match the context will cause a check failure. So we lower
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// LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
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// 'unreachable' instructions which is meant for that case.
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this->Options.TrapUnreachable = true;
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// WebAssembly treats each function as an independent unit. Force
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// -ffunction-sections, effectively, so that we can emit them independently.
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this->Options.FunctionSections = true;
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this->Options.DataSections = true;
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this->Options.UniqueSectionNames = true;
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initAsmInfo();
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// Note that we don't use setRequiresStructuredCFG(true). It disables
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// optimizations than we're ok with, and want, such as critical edge
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// splitting and tail merging.
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}
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WebAssemblyTargetMachine::~WebAssemblyTargetMachine() = default; // anchor.
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const WebAssemblySubtarget *WebAssemblyTargetMachine::getSubtargetImpl() const {
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return getSubtargetImpl(std::string(getTargetCPU()),
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std::string(getTargetFeatureString()));
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}
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const WebAssemblySubtarget *
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WebAssemblyTargetMachine::getSubtargetImpl(std::string CPU,
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std::string FS) const {
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auto &I = SubtargetMap[CPU + FS];
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if (!I) {
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I = std::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
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}
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return I.get();
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}
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const WebAssemblySubtarget *
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WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
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Attribute CPUAttr = F.getFnAttribute("target-cpu");
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Attribute FSAttr = F.getFnAttribute("target-features");
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std::string CPU =
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CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
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std::string FS =
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FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
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// This needs to be done before we create a new subtarget since any
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// creation will depend on the TM and the code generation flags on the
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// function that reside in TargetOptions.
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resetTargetOptions(F);
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return getSubtargetImpl(CPU, FS);
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}
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namespace {
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class CoalesceFeaturesAndStripAtomics final : public ModulePass {
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// Take the union of all features used in the module and use it for each
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// function individually, since having multiple feature sets in one module
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// currently does not make sense for WebAssembly. If atomics are not enabled,
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// also strip atomic operations and thread local storage.
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static char ID;
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WebAssemblyTargetMachine *WasmTM;
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public:
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CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM)
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: ModulePass(ID), WasmTM(WasmTM) {}
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bool runOnModule(Module &M) override {
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FeatureBitset Features = coalesceFeatures(M);
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std::string FeatureStr = getFeatureString(Features);
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WasmTM->setTargetFeatureString(FeatureStr);
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for (auto &F : M)
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replaceFeatures(F, FeatureStr);
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bool StrippedAtomics = false;
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bool StrippedTLS = false;
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if (!Features[WebAssembly::FeatureAtomics])
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StrippedAtomics = stripAtomics(M);
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if (!Features[WebAssembly::FeatureBulkMemory])
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StrippedTLS = stripThreadLocals(M);
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if (StrippedAtomics && !StrippedTLS)
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stripThreadLocals(M);
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else if (StrippedTLS && !StrippedAtomics)
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stripAtomics(M);
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recordFeatures(M, Features, StrippedAtomics || StrippedTLS);
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// Conservatively assume we have made some change
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return true;
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}
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private:
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FeatureBitset coalesceFeatures(const Module &M) {
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FeatureBitset Features =
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WasmTM
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->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
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std::string(WasmTM->getTargetFeatureString()))
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->getFeatureBits();
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for (auto &F : M)
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Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
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return Features;
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}
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std::string getFeatureString(const FeatureBitset &Features) {
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std::string Ret;
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for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
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if (Features[KV.Value])
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Ret += (StringRef("+") + KV.Key + ",").str();
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}
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return Ret;
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}
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void replaceFeatures(Function &F, const std::string &Features) {
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F.removeFnAttr("target-features");
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F.removeFnAttr("target-cpu");
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F.addFnAttr("target-features", Features);
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}
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bool stripAtomics(Module &M) {
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// Detect whether any atomics will be lowered, since there is no way to tell
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// whether the LowerAtomic pass lowers e.g. stores.
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bool Stripped = false;
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for (auto &F : M) {
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for (auto &B : F) {
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for (auto &I : B) {
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if (I.isAtomic()) {
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Stripped = true;
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goto done;
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}
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}
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}
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}
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done:
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if (!Stripped)
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return false;
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LowerAtomicPass Lowerer;
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FunctionAnalysisManager FAM;
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for (auto &F : M)
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Lowerer.run(F, FAM);
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return true;
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}
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bool stripThreadLocals(Module &M) {
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bool Stripped = false;
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for (auto &GV : M.globals()) {
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if (GV.isThreadLocal()) {
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Stripped = true;
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GV.setThreadLocal(false);
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}
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}
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return Stripped;
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}
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void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) {
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for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
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if (Features[KV.Value]) {
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// Mark features as used
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std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str();
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M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
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wasm::WASM_FEATURE_PREFIX_USED);
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}
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}
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// Code compiled without atomics or bulk-memory may have had its atomics or
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// thread-local data lowered to nonatomic operations or non-thread-local
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// data. In that case, we mark the pseudo-feature "shared-mem" as disallowed
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// to tell the linker that it would be unsafe to allow this code ot be used
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// in a module with shared memory.
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if (Stripped) {
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M.addModuleFlag(Module::ModFlagBehavior::Error, "wasm-feature-shared-mem",
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wasm::WASM_FEATURE_PREFIX_DISALLOWED);
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}
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}
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};
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char CoalesceFeaturesAndStripAtomics::ID = 0;
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/// WebAssembly Code Generator Pass Configuration Options.
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class WebAssemblyPassConfig final : public TargetPassConfig {
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public:
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WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
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: TargetPassConfig(TM, PM) {}
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WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
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return getTM<WebAssemblyTargetMachine>();
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}
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FunctionPass *createTargetRegisterAllocator(bool) override;
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void addIRPasses() override;
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bool addInstSelector() override;
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void addPostRegAlloc() override;
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bool addGCPasses() override { return false; }
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void addPreEmitPass() override;
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// No reg alloc
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bool addRegAssignAndRewriteFast() override { return false; }
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// No reg alloc
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bool addRegAssignAndRewriteOptimized() override { return false; }
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};
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} // end anonymous namespace
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TargetTransformInfo
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WebAssemblyTargetMachine::getTargetTransformInfo(const Function &F) {
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return TargetTransformInfo(WebAssemblyTTIImpl(this, F));
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}
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TargetPassConfig *
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WebAssemblyTargetMachine::createPassConfig(PassManagerBase &PM) {
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return new WebAssemblyPassConfig(*this, PM);
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}
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FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
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return nullptr; // No reg alloc
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}
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//===----------------------------------------------------------------------===//
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// The following functions are called from lib/CodeGen/Passes.cpp to modify
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// the CodeGen pass sequence.
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//===----------------------------------------------------------------------===//
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void WebAssemblyPassConfig::addIRPasses() {
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// Lower atomics and TLS if necessary
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addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine()));
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// This is a no-op if atomics are not used in the module
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addPass(createAtomicExpandPass());
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// Add signatures to prototype-less function declarations
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addPass(createWebAssemblyAddMissingPrototypes());
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// Lower .llvm.global_dtors into .llvm_global_ctors with __cxa_atexit calls.
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addPass(createWebAssemblyLowerGlobalDtors());
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// Fix function bitcasts, as WebAssembly requires caller and callee signatures
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// to match.
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addPass(createWebAssemblyFixFunctionBitcasts());
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// Optimize "returned" function attributes.
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if (getOptLevel() != CodeGenOpt::None)
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addPass(createWebAssemblyOptimizeReturned());
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// If exception handling is not enabled and setjmp/longjmp handling is
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// enabled, we lower invokes into calls and delete unreachable landingpad
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// blocks. Lowering invokes when there is no EH support is done in
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// TargetPassConfig::addPassesToHandleExceptions, but this runs after this
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// function and SjLj handling expects all invokes to be lowered before.
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if (!EnableEmException &&
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TM->Options.ExceptionModel == ExceptionHandling::None) {
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addPass(createLowerInvokePass());
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// The lower invoke pass may create unreachable code. Remove it in order not
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// to process dead blocks in setjmp/longjmp handling.
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addPass(createUnreachableBlockEliminationPass());
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}
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// Handle exceptions and setjmp/longjmp if enabled.
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if (EnableEmException || EnableEmSjLj)
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addPass(createWebAssemblyLowerEmscriptenEHSjLj(EnableEmException,
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EnableEmSjLj));
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// Expand indirectbr instructions to switches.
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addPass(createIndirectBrExpandPass());
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TargetPassConfig::addIRPasses();
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}
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bool WebAssemblyPassConfig::addInstSelector() {
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(void)TargetPassConfig::addInstSelector();
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addPass(
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createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
|
|
// Run the argument-move pass immediately after the ScheduleDAG scheduler
|
|
// so that we can fix up the ARGUMENT instructions before anything else
|
|
// sees them in the wrong place.
|
|
addPass(createWebAssemblyArgumentMove());
|
|
// Set the p2align operands. This information is present during ISel, however
|
|
// it's inconvenient to collect. Collect it now, and update the immediate
|
|
// operands.
|
|
addPass(createWebAssemblySetP2AlignOperands());
|
|
|
|
// Eliminate range checks and add default targets to br_table instructions.
|
|
addPass(createWebAssemblyFixBrTableDefaults());
|
|
|
|
return false;
|
|
}
|
|
|
|
void WebAssemblyPassConfig::addPostRegAlloc() {
|
|
// TODO: The following CodeGen passes don't currently support code containing
|
|
// virtual registers. Consider removing their restrictions and re-enabling
|
|
// them.
|
|
|
|
// These functions all require the NoVRegs property.
|
|
disablePass(&MachineCopyPropagationID);
|
|
disablePass(&PostRAMachineSinkingID);
|
|
disablePass(&PostRASchedulerID);
|
|
disablePass(&FuncletLayoutID);
|
|
disablePass(&StackMapLivenessID);
|
|
disablePass(&LiveDebugValuesID);
|
|
disablePass(&PatchableFunctionID);
|
|
disablePass(&ShrinkWrapID);
|
|
|
|
// This pass hurts code size for wasm because it can generate irreducible
|
|
// control flow.
|
|
disablePass(&MachineBlockPlacementID);
|
|
|
|
TargetPassConfig::addPostRegAlloc();
|
|
}
|
|
|
|
void WebAssemblyPassConfig::addPreEmitPass() {
|
|
TargetPassConfig::addPreEmitPass();
|
|
|
|
// Eliminate multiple-entry loops.
|
|
addPass(createWebAssemblyFixIrreducibleControlFlow());
|
|
|
|
// Do various transformations for exception handling.
|
|
// Every CFG-changing optimizations should come before this.
|
|
if (TM->Options.ExceptionModel == ExceptionHandling::Wasm)
|
|
addPass(createWebAssemblyLateEHPrepare());
|
|
|
|
// Now that we have a prologue and epilogue and all frame indices are
|
|
// rewritten, eliminate SP and FP. This allows them to be stackified,
|
|
// colored, and numbered with the rest of the registers.
|
|
addPass(createWebAssemblyReplacePhysRegs());
|
|
|
|
// Preparations and optimizations related to register stackification.
|
|
if (getOptLevel() != CodeGenOpt::None) {
|
|
// LiveIntervals isn't commonly run this late. Re-establish preconditions.
|
|
addPass(createWebAssemblyPrepareForLiveIntervals());
|
|
|
|
// Depend on LiveIntervals and perform some optimizations on it.
|
|
addPass(createWebAssemblyOptimizeLiveIntervals());
|
|
|
|
// Prepare memory intrinsic calls for register stackifying.
|
|
addPass(createWebAssemblyMemIntrinsicResults());
|
|
|
|
// Mark registers as representing wasm's value stack. This is a key
|
|
// code-compression technique in WebAssembly. We run this pass (and
|
|
// MemIntrinsicResults above) very late, so that it sees as much code as
|
|
// possible, including code emitted by PEI and expanded by late tail
|
|
// duplication.
|
|
addPass(createWebAssemblyRegStackify());
|
|
|
|
// Run the register coloring pass to reduce the total number of registers.
|
|
// This runs after stackification so that it doesn't consider registers
|
|
// that become stackified.
|
|
addPass(createWebAssemblyRegColoring());
|
|
}
|
|
|
|
// Sort the blocks of the CFG into topological order, a prerequisite for
|
|
// BLOCK and LOOP markers.
|
|
addPass(createWebAssemblyCFGSort());
|
|
|
|
// Insert BLOCK and LOOP markers.
|
|
addPass(createWebAssemblyCFGStackify());
|
|
|
|
// Insert explicit local.get and local.set operators.
|
|
if (!WasmDisableExplicitLocals)
|
|
addPass(createWebAssemblyExplicitLocals());
|
|
|
|
// Lower br_unless into br_if.
|
|
addPass(createWebAssemblyLowerBrUnless());
|
|
|
|
// Perform the very last peephole optimizations on the code.
|
|
if (getOptLevel() != CodeGenOpt::None)
|
|
addPass(createWebAssemblyPeephole());
|
|
|
|
// Create a mapping from LLVM CodeGen virtual registers to wasm registers.
|
|
addPass(createWebAssemblyRegNumbering());
|
|
|
|
// Fix debug_values whose defs have been stackified.
|
|
if (!WasmDisableExplicitLocals)
|
|
addPass(createWebAssemblyDebugFixup());
|
|
}
|
|
|
|
yaml::MachineFunctionInfo *
|
|
WebAssemblyTargetMachine::createDefaultFuncInfoYAML() const {
|
|
return new yaml::WebAssemblyFunctionInfo();
|
|
}
|
|
|
|
yaml::MachineFunctionInfo *WebAssemblyTargetMachine::convertFuncInfoToYAML(
|
|
const MachineFunction &MF) const {
|
|
const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
|
|
return new yaml::WebAssemblyFunctionInfo(*MFI);
|
|
}
|
|
|
|
bool WebAssemblyTargetMachine::parseMachineFunctionInfo(
|
|
const yaml::MachineFunctionInfo &MFI, PerFunctionMIParsingState &PFS,
|
|
SMDiagnostic &Error, SMRange &SourceRange) const {
|
|
const auto &YamlMFI =
|
|
reinterpret_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
|
|
MachineFunction &MF = PFS.MF;
|
|
MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(YamlMFI);
|
|
return false;
|
|
}
|