2291bd137d
Support for XNACK and SRAMECC is not static on some GPUs. We must be able to differentiate between different scenarios for these dynamic subtarget features. The possible settings are: - Unsupported: The GPU has no support for XNACK/SRAMECC. - Any: Preference is unspecified. Use conservative settings that can run anywhere. - Off: Request support for XNACK/SRAMECC Off - On: Request support for XNACK/SRAMECC On GCNSubtarget will track the four options based on the following criteria. If the subtarget does not support XNACK/SRAMECC we say the setting is "Unsupported". If no subtarget features for XNACK/SRAMECC are requested we must support "Any" mode. If the subtarget features XNACK/SRAMECC exist in the feature string when initializing the subtarget, the settings are "On/Off". The defaults are updated to be conservatively correct, meaning if no setting for XNACK or SRAMECC is explicitly requested, defaults will be used which generate code that can be run anywhere. This corresponds to the "Any" setting. Differential Revision: https://reviews.llvm.org/D85882
23 lines
1.1 KiB
LLVM
23 lines
1.1 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,NO-ECC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,NO-ECC %s
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; RUN: llc -march=amdgcn -mcpu=gfx904 -mattr=+sramecc < %s | FileCheck -check-prefixes=GCN,NO-ECC %s
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; RUN: llc -march=amdgcn -mcpu=gfx906 -mattr=+sramecc < %s | FileCheck -check-prefixes=GCN,ECC %s
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; RUN: llc -march=amdgcn -mcpu=gfx906 -mattr=-sramecc < %s | FileCheck -check-prefixes=GCN,NO-ECC %s
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; Make sure the correct set of targets are marked with
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; FeatureDoesNotSupportSRAMECC, and +sram-ecc is ignored if it's never
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; supported.
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; GCN-LABEL: {{^}}load_global_hi_v2i16_reglo_vreg:
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; NO-ECC: global_load_short_d16_hi
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; ECC: global_load_ushort
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define void @load_global_hi_v2i16_reglo_vreg(i16 addrspace(1)* %in, i16 %reg) {
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entry:
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%gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 -2047
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%load = load i16, i16 addrspace(1)* %gep
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%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %load, i32 1
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store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
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ret void
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}
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