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clang-p2996/llvm/test/CodeGen/Thumb2
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Roman Lebedev b46c085d2b [NFCI] SCEVExpander: emit intrinsics for integral {u,s}{min,max} SCEV expressions 
These intrinsics, not the icmp+select are the canonical form nowadays,
so we might as well directly emit them.

This should not cause any regressions, but if it does,
then then they would needed to be fixed regardless.

Note that this doesn't deal with `SCEVExpander::isHighCostExpansion()`,
but that is a pessimization, not a correctness issue.

Additionally, the non-intrinsic form has issues with undef,
see https://reviews.llvm.org/D88287#2587863
2021-03-06 21:52:46 +03:00
..
LowOverheadLoops
[NFCI] SCEVExpander: emit intrinsics for integral {u,s}{min,max} SCEV expressions
2021-03-06 21:52:46 +03:00
mve-intrinsics
[SelectionDAG][ARM][AArch64][Hexagon][RISCV][X86] Add SDNPCommutative to fma and fmad nodes in tablegen. Remove explicit commuted patterns from targets.
2020-11-23 10:09:20 -08:00
2009-07-17-CrossRegClassCopy.ll
…
2009-07-21-ISelBug.ll
…
2009-07-23-CPIslandBug.ll
…
2009-07-30-PEICrash.ll
…
2009-08-01-WrongLDRBOpc.ll
…
2009-08-02-CoalescerBug.ll
…
2009-08-04-CoalescerAssert.ll
…
2009-08-04-CoalescerBug.ll
[SimplifyCFG] Teach removeUndefIntroducingPredecessor to preserve DomTree
2021-01-02 01:01:20 +03:00
2009-08-04-ScavengerAssert.ll
…
2009-08-04-SubregLoweringBug2.ll
…
2009-08-04-SubregLoweringBug3.ll
…
2009-08-04-SubregLoweringBug.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
2009-08-06-SpDecBug.ll
…
2009-08-07-CoalescerBug.ll
…
2009-08-07-NeonFPBug.ll
…
2009-08-08-ScavengerAssert.ll
…
2009-08-10-ISelBug.ll
…
2009-08-21-PostRAKill4.ll
…
2009-09-01-PostRAProlog.ll
…
2009-10-15-ITBlockBranch.ll
…
2009-11-01-CopyReg2RegBug.ll
…
2009-11-11-ScavengerAssert.ll
…
2009-11-13-STRDBug.ll
…
2009-12-01-LoopIVUsers.ll
…
2010-01-06-TailDuplicateLabels.ll
…
2010-01-19-RemovePredicates.ll
…
2010-02-11-phi-cycle.ll
…
2010-02-24-BigStack.ll
…
2010-03-08-addi12-ccout.ll
…
2010-03-15-AsmCCClobber.ll
…
2010-04-15-DynAllocBug.ll
…
2010-04-26-CopyRegCrash.ll
…
2010-05-24-rsbs.ll
…
2010-06-14-NEONCoalescer.ll
…
2010-06-19-ITBlockCrash.ll
…
2010-06-21-TailMergeBug.ll
…
2010-08-10-VarSizedAllocaBug.ll
…
2010-11-22-EpilogueBug.ll
…
2010-12-03-AddSPNarrowing.ll
…
2011-04-21-FILoweringBug.ll
…
2011-06-07-TwoAddrEarlyClobber.ll
…
2011-12-16-T2SizeReduceAssert.ll
…
2012-01-13-CBNZBug.ll
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2013-02-19-tail-call-register-hint.ll
…
2013-03-02-vduplane-nonconstant-source-index.ll
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2013-03-06-vector-sext-operand-scalarize.ll
…
aapcs.ll
…
active_lane_mask.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
aligned-constants.ll
…
aligned-nonfallthrough.ll
[ARM] Remove DLS lr, lr
2021-02-02 11:09:31 +00:00
aligned-spill.ll
…
bfi.ll
…
bfx.ll
…
bicbfi.ll
…
block-placement.mir
[ARM][Block placement] Check the predecessor exists before processing it
2021-01-15 15:45:13 +00:00
bug-subw.ll
…
buildvector-crash.ll
…
call-site-info-update.ll
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carry.ll
…
cbnz.ll
…
cde-gpr.ll
…
cde-vec.ll
…
cde-vfp.ll
…
cmp-frame.ll
…
constant-hoisting.ll
[ARM] Fix IT block generation after Thumb2SizeReduce with -Oz
2020-10-29 15:17:31 +00:00
constant-islands-cbz.ll
…
constant-islands-cbz.mir
[ARM] Ensure undef is propagated to CBZ/CBNZ flags
2021-03-03 08:02:58 +00:00
constant-islands-cbzundef.mir
[ARM] Ensure undef is propagated to CBZ/CBNZ flags
2021-03-03 08:02:58 +00:00
constant-islands-jump-table.ll
…
constant-islands-ldrsb.mir
[ARM] Add handling of t2LDRSB/t2LDRSH in Constant Island Pass
2021-03-02 08:46:07 +00:00
constant-islands-new-island-padding.ll
…
constant-islands-new-island.ll
…
constant-islands.ll
OpaquePtr: Update more tests to use typed sret
2020-11-20 20:08:43 -05:00
cortex-fp.ll
…
crash.ll
…
cross-rc-coalescing-1.ll
…
cross-rc-coalescing-2.ll
…
csel.ll
[ARM] CSEL generation
2020-07-16 11:10:53 +01:00
div.ll
…
emit-unwinding.ll
…
fir.ll
[ARM] Remove unused check labels. NFC
2020-11-12 08:37:46 +00:00
float-cmp.ll
…
float-intrinsics-double.ll
[ARM] Make tests less dependent on scheduling. NFC
2020-11-05 08:26:55 +00:00
float-intrinsics-float.ll
[ARM] Remove unused check labels. NFC
2020-11-12 08:37:46 +00:00
float-ops.ll
[ARM] CSEL generation
2020-07-16 11:10:53 +01:00
fp16-stacksplot.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
frame-index-addrmode-t2i8s4.mir
[ARM] Fix rewrite of frame index in Thumb2's address mode i8s4
2020-05-27 13:09:13 +01:00
frame-pointer.ll
…
frameless2.ll
…
frameless.ll
…
high-reg-spill.mir
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
ifcvt-cbz.mir
…
ifcvt-compare.ll
…
ifcvt-dead-predicate.mir
[ARM] Fix IT block generation after Thumb2SizeReduce with -Oz
2020-10-29 15:17:31 +00:00
ifcvt-minsize.ll
Revert "[IPRA][ARM] Spill extra registers at -Oz"
2020-04-06 10:34:59 +01:00
ifcvt-neon-deprecated.mir
…
ifcvt-no-branch-predictor.ll
[ARM] Make tests less dependent on scheduling. NFC
2020-11-05 08:26:55 +00:00
ifcvt-rescan-bug-2016-08-22.ll
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ifcvt-rescan-diamonds.ll
ARM: make Thumb1 instructions non-flag-setting in IT block.
2020-07-28 13:31:17 +01:00
inflate-regs.ll
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inline-asm-i-constraint-i1.ll
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inlineasm-error-t-toofewregs-mve.ll
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inlineasm-mve.ll
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inlineasm.ll
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intrinsics-cc.ll
…
intrinsics-coprocessor.ll
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large-call.ll
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large-stack.ll
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ldr-str-imm12.ll
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lit.local.cfg
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longMACt.ll
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lsll0.ll
[DAG] SimplifyMultipleUseDemandedBits - remove superfluous bitcasts
2020-05-08 19:04:49 +01:00
lsr-deficiency.ll
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m4-sched-ldr.mir
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m4-sched-regs.ll
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machine-licm.ll
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mul_const.ll
…
mve-abs.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-basic.ll
[SelectionDAG] Don't promote the alignment of allocas beyond the stack alignment.
2020-05-11 17:39:00 -07:00
mve-be.ll
[ARM] VECTOR_REG_CAST undef -> undef
2021-02-28 11:13:49 +00:00
mve-bitarith.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-bitcasts.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-bitreverse.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-blockplacement.ll
[ARM] Remove dead mov's in preheader of tail predicated loops
2021-02-11 10:48:20 +00:00
mve-bswap.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-ctlz.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-ctpop.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-cttz.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-div-expand.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-extractelt.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-extractstore.ll
[ARM] Optimize fp store of extract to integer store if already available.
2021-02-12 18:34:58 +00:00
mve-float16regloops.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-float32regloops.ll
[ARM] Expand the range of allowed post-incs in load/store optimizer
2021-02-24 08:46:15 +00:00
mve-fma-loops.ll
[ARM] Make t2DoLoopStartTP a terminator
2020-12-11 09:23:57 +00:00
mve-fmas.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-fmath.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-fp16convertloops.ll
[ARM] Remove DLS lr, lr
2021-02-02 11:09:31 +00:00
mve-fp-negabs.ll
[ARM] Select VINS from vector inserts
2021-02-02 13:50:02 +00:00
mve-frint.ll
[ARM] Select VINS from vector inserts
2021-02-02 13:50:02 +00:00
mve-gather-increment.ll
[ARM] Don't handle low overhead branches in AnalyzeBranch
2021-01-18 17:16:07 +00:00
mve-gather-ind8-unscaled.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-gather-ind16-scaled.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-gather-ind16-unscaled.ll
[ARM][MVE] Enable MVE gathers and scatters by default
2020-08-28 19:05:29 +01:00
mve-gather-ind32-scaled.ll
[ARM][MVE] Enable MVE gathers and scatters by default
2020-08-28 19:05:29 +01:00
mve-gather-ind32-unscaled.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-gather-optimisation-deep.ll
[ARM][MVE] Enable MVE gathers and scatters by default
2020-08-28 19:05:29 +01:00
mve-gather-ptrs.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-gather-scatter-opt.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-gather-scatter-optimisation.ll
[ARM] Remove DLS lr, lr
2021-02-02 11:09:31 +00:00
mve-gather-scatter-ptr-address.ll
[ARM] Remove DLS lr, lr
2021-02-02 11:09:31 +00:00
mve-gather-scatter-tailpred.ll
[ARM] Remove DLS lr, lr
2021-02-02 11:09:31 +00:00
mve-gather-tailpred.ll
[ARM] Don't handle low overhead branches in AnalyzeBranch
2021-01-18 17:16:07 +00:00
mve-halving.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-laneinterleaving-cost.ll
[ARM] Add some tests for MVE lane interleaving. NFC
2021-02-14 16:51:18 +00:00
mve-laneinterleaving.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-ldst-offset.ll
[ARM] Change more triples to arm-none-none-eabi. NFC
2020-05-15 22:53:07 +01:00
mve-ldst-postinc.ll
[ARM] Change more triples to arm-none-none-eabi. NFC
2020-05-15 22:53:07 +01:00
mve-ldst-preinc.ll
[ARM] Change more triples to arm-none-none-eabi. NFC
2020-05-15 22:53:07 +01:00
mve-ldst-regimm.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-loadstore.ll
[ARM] Remove unused check labels. NFC
2020-11-12 08:37:46 +00:00
mve-masked-ldst-offset.ll
[ARM] Remove unused check labels. NFC
2020-11-12 08:37:46 +00:00
mve-masked-ldst-postinc.ll
[ARM] Remove unused check labels. NFC
2020-11-12 08:37:46 +00:00
mve-masked-ldst-preinc.ll
[ARM] Remove unused check labels. NFC
2020-11-12 08:37:46 +00:00
mve-masked-ldst.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-masked-load.ll
Expand masked mem intrinsics correctly wrt big-endian
2021-02-11 08:59:52 +00:00
mve-masked-store.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-minmax.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-multivec-spill.ll
[ARM][RegisterScavenging] Don't consider LR liveout if it is not reloaded
2021-01-28 09:22:55 +00:00
mve-neg.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-nofloat.ll
[ARM] Remove unused check labels. NFC
2020-11-12 08:37:46 +00:00
mve-nounrolledremainder.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-phireg.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-postinc-dct.ll
[ARM] Remove dead mov's in preheader of tail predicated loops
2021-02-11 10:48:20 +00:00
mve-postinc-distribute.ll
[ARM] Extend search for increment in load/store optimizer
2021-02-15 13:17:21 +00:00
mve-postinc-distribute.mir
[ARM] Use rGPR for writeback vldrs
2021-02-16 16:44:47 +00:00
mve-postinc-lsr.ll
[ARM] Extend search for increment in load/store optimizer
2021-02-15 13:17:21 +00:00
mve-pred-and.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-pred-bitcast.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-pred-build-const.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-pred-build-var.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-pred-const.ll
[ARM] MVE predcast with const test. NFC
2020-05-05 09:53:42 +01:00
mve-pred-constfold.ll
[ARM] MVE vcreate tests, for dual lane moves. NFC
2020-12-10 09:17:34 +00:00
mve-pred-convert.ll
[ARM] Correct the type on a predicate cast
2020-05-05 13:15:10 +01:00
mve-pred-ext.ll
[ARM] Custom lower i1 vector truncates
2021-01-08 18:21:00 +00:00
mve-pred-loadstore.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-pred-not.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-pred-or.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-pred-selectop2.ll
[ARM] Update target triple in tests. NFC
2020-10-30 15:06:49 +00:00
mve-pred-selectop3.ll
[ARM] Update target triple in tests. NFC
2020-10-30 15:06:49 +00:00
mve-pred-selectop.ll
[ARM] Update target triple in tests. NFC
2020-10-30 15:06:49 +00:00
mve-pred-shuffle.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-pred-spill.ll
[ARM] Remove unused check labels. NFC
2020-11-12 08:37:46 +00:00
mve-pred-threshold.ll
[ARM] Remove DLS lr, lr
2021-02-02 11:09:31 +00:00
mve-pred-vctpvpsel.ll
[ARM] Remove dead mov's in preheader of tail predicated loops
2021-02-11 10:48:20 +00:00
mve-pred-vselect.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-pred-xor.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-qrintr.ll
[ARM] Sink splats to MVE intrinsics
2020-09-17 16:00:51 +01:00
mve-satmul-loops.ll
[ARM] Extend search for increment in load/store optimizer
2021-02-15 13:17:21 +00:00
mve-saturating-arith.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-scatter-increment.ll
[ARM] Don't handle low overhead branches in AnalyzeBranch
2021-01-18 17:16:07 +00:00
mve-scatter-ind8-unscaled.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-scatter-ind16-scaled.ll
[ARM][MVE] Enable MVE gathers and scatters by default
2020-08-28 19:05:29 +01:00
mve-scatter-ind16-unscaled.ll
[ARM][MVE] Enable MVE gathers and scatters by default
2020-08-28 19:05:29 +01:00
mve-scatter-ind32-scaled.ll
[ARM][MVE] Enable MVE gathers and scatters by default
2020-08-28 19:05:29 +01:00
mve-scatter-ind32-unscaled.ll
[ARM][MVE] Enable MVE gathers and scatters by default
2020-08-28 19:05:29 +01:00
mve-scatter-ptrs.ll
[ARM][MVE] Enable MVE gathers and scatters by default
2020-08-28 19:05:29 +01:00
mve-selectcc.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-sext-masked-load.ll
[DAGCombiner] Fold sext_inreg of a masked load into a sign extended masked load
2020-07-30 10:34:02 +01:00
mve-sext.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-shifts-scalar.ll
[ARM] Remove DLS lr, lr
2021-02-02 11:09:31 +00:00
mve-shifts.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-shuffle.ll
[DAG] visitVECTOR_SHUFFLE - attempt to match commuted shuffles with MergeInnerShuffle.
2021-03-01 10:42:11 +00:00
mve-shuffleext.ll
[ARM] Additional tests for different interleaving patterns. NFC
2021-01-13 08:31:50 +00:00
mve-shufflemov.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-simple-arith.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-soft-float-abi.ll
[ARM] Simplify VMOVRRD from extracts of buildvectors
2021-02-01 16:09:25 +00:00
mve-stack.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-stacksplot.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vabd.ll
[ARM] Remove unused check labels. NFC
2020-11-12 08:37:46 +00:00
mve-vabdus.ll
[ARM] Remove DLS lr, lr
2021-02-02 11:09:31 +00:00
mve-vaddqr.ll
[ARM] Use half directly for args/return types in test. NFC
2021-01-25 17:50:19 +00:00
mve-vaddv.ll
[llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics.
2020-10-07 10:36:44 -07:00
mve-vcmp.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-vcmpf.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-vcmpfr.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-vcmpfz.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-vcmpr.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-vcmpz.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-vcreate.ll
[ARM] Simplify VMOVRRD from extracts of buildvectors
2021-02-01 16:09:25 +00:00
mve-vctp.ll
[ARM] Convert VPSEL to VMOV in tail predicated loops
2020-08-03 22:03:14 +01:00
mve-vcvt16.ll
[PeepholeOptimizer] Enhance the redundant COPY elimination.
2020-09-22 10:11:37 -04:00
mve-vcvt.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-vdup.ll
[ARM] Use half directly for args/return types in test. NFC
2021-01-25 17:50:19 +00:00
mve-vecreduce-add.ll
[ARM] Mark MVE_VMOV_to_lane_32 as isInsertSubregLike
2021-02-02 16:35:47 +00:00
mve-vecreduce-addpred.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-vecreduce-bit.ll
[ARM] Update target triple in tests. NFC
2020-10-30 15:06:49 +00:00
mve-vecreduce-fadd.ll
[ARM] Use half directly for args/return types in test. NFC
2021-01-25 17:50:19 +00:00
mve-vecreduce-fminmax.ll
[ARM] Use half directly for args/return types in test. NFC
2021-01-25 17:50:19 +00:00
mve-vecreduce-fmul.ll
[ARM] Use half directly for args/return types in test. NFC
2021-01-25 17:50:19 +00:00
mve-vecreduce-loops.ll
[ARM] Extend search for increment in load/store optimizer
2021-02-15 13:17:21 +00:00
mve-vecreduce-mla.ll
[ARM] Mark MVE_VMOV_to_lane_32 as isInsertSubregLike
2021-02-02 16:35:47 +00:00
mve-vecreduce-mlapred.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-vecreduce-mul.ll
[ARM] Update target triple in tests. NFC
2020-10-30 15:06:49 +00:00
mve-vector-spill.ll
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
mve-vfma.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vhaddsub.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vld2-post.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-vld2.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-vld3.ll
[DAG] visitVECTOR_SHUFFLE - attempt to match commuted shuffles with MergeInnerShuffle.
2021-03-01 10:42:11 +00:00
mve-vld4-post.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-vld4.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-vldshuffle.ll
[ARM] Extend search for increment in load/store optimizer
2021-02-15 13:17:21 +00:00
mve-vldst4.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-vmaxnma-commute.ll
[ARM] Mark VMINNMA/VMAXNMA as commutative
2020-08-13 18:01:11 +01:00
mve-vmaxv-vminv-scalar.ll
[ARM] Replace llvm.experimental.vector.reduce.smax with llvm.vector.reduce.smax. NFC
2020-10-08 08:05:48 +01:00
mve-vmaxv.ll
[llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics.
2020-10-07 10:36:44 -07:00
mve-vmla.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vmovimm.ll
[ARM] KnownBits for CSINC/CSNEG/CSINV
2021-03-04 08:40:20 +00:00
mve-vmovn.ll
[ARM] VMOVN undef folding
2021-02-28 14:44:45 +00:00
mve-vmovnstore.ll
[ARM] Select VINS from vector inserts
2021-02-02 13:50:02 +00:00
mve-vmulh.ll
[DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE (REAPPLIED).
2021-01-21 13:01:34 +00:00
mve-vmull-loop.ll
[DAG] visitVECTOR_SHUFFLE - MergeInnerShuffle - improve shuffle(shuffle(x,y),shuffle(x,y)) merging
2021-01-15 15:08:31 +00:00
mve-vmull.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vmulqr.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vmvnimm.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vpsel.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vpt-2-blocks-1-pred.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vpt-2-blocks-2-preds.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vpt-2-blocks-ctrl-flow.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vpt-2-blocks-non-consecutive-ins.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vpt-2-blocks.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vpt-3-blocks-kill-vpr.mir
[ARM] Remove dead instructions before creating VPT block bundles
2020-12-08 14:05:07 +00:00
mve-vpt-block-1-ins.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vpt-block-2-ins.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vpt-block-4-ins.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vpt-block-elses.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vpt-block-fold-vcmp.mir
…
mve-vpt-block-kill.mir
[ARM] Remove kill flags between VCMP and insertion point
2020-11-09 13:17:53 +00:00
mve-vpt-block-optnone.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vpt-blocks.ll
[Target][ARM] Replace re-uses of old VPR values with VPNOTs
2020-05-12 12:09:57 +01:00
mve-vpt-from-intrinsics.ll
[InstCombine] Move target-specific inst combining
2020-07-22 15:59:49 +02:00
mve-vpt-nots.mir
…
mve-vpt-optimisations.mir
[ARM] Common inverse constant predicates to VPNOT
2020-12-09 07:56:44 +00:00
mve-vpt-preuse.mir
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vqdmulh.ll
[ARM] Remove DLS lr, lr
2021-02-02 11:09:31 +00:00
mve-vqmovn-combine.ll
[ARM] Update target triple in tests. NFC
2020-10-30 15:06:49 +00:00
mve-vqmovn.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-vqshrn.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-vst2-post.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vst2.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-vst3.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-vst4-post.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-vst4.ll
[ARM] Move double vector insert patterns using vins to DAG combine
2021-02-22 09:29:47 +00:00
mve-vsubqr.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
mve-widen-narrow.ll
[ARM] Match dual lane vmovs from insert_vector_elt
2020-12-18 16:13:08 +00:00
mve-zext-masked-load.ll
[DAGCombiner] Fold an AND of a masked load into a zext_masked_load
2020-09-01 17:02:07 +01:00
peephole-addsub.mir
…
peephole-cmp.mir
…
pic-load.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
postinc-distribute.mir
[ARM] Distribute post-inc for Thumb2 sign/zero extending loads/stores
2020-08-01 14:01:18 +01:00
scavenge-lr.mir
[NFC] Move scavenge-lr.mir From AArch64 to Thumb2 test directory.
2021-01-28 10:22:31 +00:00
schedm7-hazard.ll
[ARM] Add bank conflict hazarding
2020-12-23 14:00:59 +00:00
segmented-stacks.ll
…
setjmp_longjmp.ll
…
shift_parts.ll
…
stack_guard_remat.ll
…
store-prepostinc.mir
[ARM] Expand the range of allowed post-incs in load/store optimizer
2021-02-24 08:46:15 +00:00
t2-teq-reduce.mir
Rename t2-reduce-size -> thumb2-reduce-size
2020-07-27 13:42:13 -07:00
t2peephole-t2ADDrr-to-t2ADDri.ll
…
t2sizereduction.mir
Rename t2-reduce-size -> thumb2-reduce-size
2020-07-27 13:42:13 -07:00
tail-call-r9.ll
…
tbb-removeadd.mir
…
thumb2-adc.ll
…
thumb2-add2.ll
…
thumb2-add3.ll
…
thumb2-add4.ll
…
thumb2-add5.ll
…
thumb2-add6.ll
…
thumb2-add.ll
…
thumb2-and2.ll
…
thumb2-and.ll
…
thumb2-asr2.ll
…
thumb2-asr.ll
…
thumb2-bcc.ll
…
thumb2-bfc.ll
…
thumb2-bic.ll
…
thumb2-branch.ll
Revert "[BPI] Improve static heuristics for integer comparisons"
2020-08-17 20:44:33 +02:00
thumb2-call-tc.ll
…
thumb2-call.ll
…
thumb2-cbnz.ll
…
thumb2-clz.ll
…
thumb2-cmn2.ll
…
thumb2-cmn.ll
…
thumb2-cmp.ll
…
thumb2-cpsr-liveness.ll
…
thumb2-eor2.ll
…
thumb2-eor.ll
…
thumb2-execute-only-prologue.ll
[ARM] unwinding .pad instructions missing in execute-only prologue
2020-04-07 11:51:59 +01:00
thumb2-ifcvt1-tc.ll
…
thumb2-ifcvt1.ll
Correctly modify the CFG in IfConverter, and then remove the
2020-05-07 18:17:07 -04:00
thumb2-ifcvt2.ll
…
thumb2-ifcvt3.ll
…
thumb2-jtb.ll
…
thumb2-ldm.ll
…
thumb2-ldr_ext.ll
…
thumb2-ldr_post.ll
…
thumb2-ldr_pre.ll
…
thumb2-ldr.ll
…
thumb2-ldrb.ll
…
thumb2-ldrd.ll
…
thumb2-ldrh.ll
…
thumb2-lsl2.ll
…
thumb2-lsl.ll
…
thumb2-lsr2.ll
…
thumb2-lsr3.ll
…
thumb2-lsr.ll
…
thumb2-mla.ll
…
thumb2-mls.ll
…
thumb2-mov.ll
…
thumb2-mul.ll
…
thumb2-mulhi.ll
…
thumb2-mvn2.ll
…
thumb2-mvn.ll
…
thumb2-neg.ll
…
thumb2-orn2.ll
…
thumb2-orn.ll
…
thumb2-orr2.ll
…
thumb2-orr.ll
…
thumb2-pack.ll
…
thumb2-rev16.ll
…
thumb2-rev.ll
…
thumb2-ror.ll
…
thumb2-rsb2.ll
…
thumb2-rsb.ll
…
thumb2-sbc.ll
…
thumb2-select_xform.ll
…
thumb2-select.ll
…
thumb2-shifter.ll
…
thumb2-smla.ll
…
thumb2-smul.ll
…
thumb2-spill-q.ll
…
thumb2-str_post.ll
…
thumb2-str_pre.ll
…
thumb2-str.ll
…
thumb2-strb.ll
…
thumb2-strh.ll
…
thumb2-sub2.ll
…
thumb2-sub3.ll
…
thumb2-sub4.ll
…
thumb2-sub5.ll
…
thumb2-sub.ll
…
thumb2-sxt_rot.ll
…
thumb2-sxt-uxt.ll
…
thumb2-tbb.ll
…
thumb2-tbh.ll
…
thumb2-teq2.ll
…
thumb2-teq.ll
…
thumb2-tst2.ll
…
thumb2-tst.ll
…
thumb2-uxt_rot.ll
…
thumb2-uxtb.ll
[ARM] Remove unused check labels. NFC
2020-11-12 08:37:46 +00:00
tls1.ll
[test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:47:16 -08:00
tls2.ll
…
tpsoft.ll
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
umulo-64-legalisation-lowering.ll
…
umulo-128-legalisation-lowering.ll
[MachineInstr] Add support for instructions with multiple memory operands.
2020-11-03 20:44:40 -05:00
unreachable-large-offset-gep.ll
…
v8_deprecate_IT.ll
…
v8_IT_1.ll
…
v8_IT_2.ll
…
v8_IT_3.ll
…
v8_IT_4.ll
…
v8_IT_5.ll
…
v8_IT_6.ll
…
vmovdrroffset.ll
[ARM] Fix pointer offset when splitting stores from VMOVDRR
2020-10-03 16:47:50 +01:00
vqabs.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00
vqneg.ll
[ARM] Replace arm vendor with none. NFC
2020-04-22 18:19:35 +01:00