d1a838babc
Basic block sections enables function sections implicitly, this is not needed and is inefficient with "=list" option. We had basic block sections enable function sections implicitly in clang. This is particularly inefficient with "=list" option as it places functions that do not have any basic block sections in separate sections. This causes unnecessary object file overhead for large applications. This patch disables this implicit behavior. It only creates function sections for those functions that require basic block sections. Further, there was an inconistent behavior with llc as llc was not turning on function sections by default. This patch makes llc and clang consistent and tests are added to check the new behavior. This is the first of two patches and this adds functionality in LLVM to create a new section for the entry block if function sections is not enabled. Differential Revision: https://reviews.llvm.org/D93876
133 lines
4.2 KiB
YAML
133 lines
4.2 KiB
YAML
# Start after bbsections0-prepare and check if the right code is generated.
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# RUN: llc -mtriple x86_64-unknown-linux-gnu -start-after=bbsections-prepare %s -o - | FileCheck %s -check-prefix=CHECK
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# How to generate the input:
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# foo.cc
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# int foo(bool k) {
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# if (k) return 1;
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# return 0;
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# }
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#
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# clang -O0 -S -emit-llvm foo.cc
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# llc < foo.ll -stop-after=bbsections-prepare -basic-block-sections=all
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--- |
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; Function Attrs: noinline nounwind optnone uwtable
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define dso_local i32 @_Z3foob(i1 zeroext %0) #0 {
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%2 = alloca i32, align 4
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%3 = alloca i8, align 1
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%4 = zext i1 %0 to i8
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store i8 %4, i8* %3, align 1
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%5 = load i8, i8* %3, align 1
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%6 = trunc i8 %5 to i1
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br i1 %6, label %7, label %8
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7: ; preds = %1
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store i32 1, i32* %2, align 4
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br label %9
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8: ; preds = %1
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store i32 0, i32* %2, align 4
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br label %9
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9: ; preds = %8, %7
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%10 = load i32, i32* %2, align 4
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ret i32 %10
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}
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attributes #0 = { "frame-pointer"="all" "target-cpu"="x86-64" }
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...
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---
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name: _Z3foob
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alignment: 16
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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registers: []
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liveins:
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- { reg: '$edi', virtual-reg: '' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 8
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offsetAdjustment: -8
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maxAlignment: 4
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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maxCallFrameSize: 0
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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localFrameSize: 0
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savePoint: ''
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restorePoint: ''
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fixedStack:
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- { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
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callee-saved-register: '', callee-saved-restored: true, debug-info-variable: '',
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debug-info-expression: '', debug-info-location: '' }
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stack:
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- { id: 0, type: default, offset: -24, size: 4,
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alignment: 4, stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, type: default, offset: -17, size: 1,
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alignment: 1, stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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callSites: []
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constants: []
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machineFunctionInfo: {}
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body: |
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bb.0 (%ir-block.1, align 4, bbsections 0):
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successors: %bb.2(0x40000000), %bb.1(0x40000000)
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liveins: $edi
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frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
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CFI_INSTRUCTION def_cfa_offset 16
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CFI_INSTRUCTION offset $rbp, -16
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$rbp = frame-setup MOV64rr $rsp
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CFI_INSTRUCTION def_cfa_register $rbp
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renamable $dil = AND8ri renamable $dil, 1, implicit-def dead $eflags, implicit killed $edi, implicit-def $edi
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MOV8mr $rbp, 1, $noreg, -1, $noreg, renamable $dil, implicit killed $edi :: (store 1 into %ir.3)
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TEST8mi $rbp, 1, $noreg, -1, $noreg, 1, implicit-def $eflags :: (load 1 from %ir.3)
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JCC_1 %bb.2, 4, implicit killed $eflags
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JMP_1 %bb.1
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bb.1 (%ir-block.7, bbsections 1):
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successors: %bb.3(0x80000000)
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MOV32mi $rbp, 1, $noreg, -8, $noreg, 1 :: (store 4 into %ir.2)
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JMP_1 %bb.3
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bb.2 (%ir-block.8, bbsections 2):
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successors: %bb.3(0x80000000)
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MOV32mi $rbp, 1, $noreg, -8, $noreg, 0 :: (store 4 into %ir.2)
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JMP_1 %bb.3
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bb.3 (%ir-block.9, bbsections 3):
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renamable $eax = MOV32rm $rbp, 1, $noreg, -8, $noreg :: (load 4 from %ir.2)
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$rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp
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CFI_INSTRUCTION def_cfa $rsp, 8
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RETQ implicit $eax
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...
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# CHECK: .section .text._Z3foob,"ax",@progbits
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# CHECK: _Z3foob:
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# CHECK: .section .text._Z3foob,"ax",@progbits,unique
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# CHECK: _Z3foob.__part.1:
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# CHECK: .section .text._Z3foob,"ax",@progbits,unique
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# CHECK: _Z3foob.__part.2:
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# CHECK: .section .text._Z3foob,"ax",@progbits,unique
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# CHECK: _Z3foob.__part.3:
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