caio/clang-p2996
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
6f912a2cd49150813ee467c079201b5ce3dfbbca
clang-p2996/llvm/test/Transforms/HardwareLoops/loop-guards.ll
Roman Lebedev b46c085d2b [NFCI] SCEVExpander: emit intrinsics for integral {u,s}{min,max} SCEV expressions 
These intrinsics, not the icmp+select are the canonical form nowadays,
so we might as well directly emit them.

This should not cause any regressions, but if it does,
then then they would needed to be fixed regardless.

Note that this doesn't deal with `SCEVExpander::isHighCostExpansion()`,
but that is a pessimization, not a correctness issue.

Additionally, the non-intrinsic form has issues with undef,
see https://reviews.llvm.org/D88287#2587863
2021-03-06 21:52:46 +03:00

345 lines
15 KiB
LLVM
Raw Blame History

; RUN: opt -hardware-loops -force-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32 -force-hardware-loop-guard=true -S %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-EXIT
; RUN: opt -hardware-loops -force-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32 -force-hardware-loop-guard=true -force-hardware-loop-phi=true -S %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LATCH
; RUN: opt -hardware-loops -force-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32 -force-hardware-loop-guard=false -S %s -o - | FileCheck %s --check-prefix=NO-GUARD
; NO-GUARD-NOT: @llvm.test.set.loop.iterations
; CHECK-LABEL: test1
; CHECK: entry:
; CHECK: [[MAX:%[^ ]+]] = call i32 @llvm.umax.i32(i32 %N, i32 2)
; CHECK: [[COUNT:%[^ ]+]] = add i32 [[MAX]], -1
; CHECK: br i1 %t1, label %do.body.preheader
; CHECK: do.body.preheader:
; CHECK-EXIT: call void @llvm.set.loop.iterations.i32(i32 [[COUNT]])
; CHECK-LATCH: call i32 @llvm.start.loop.iterations.i32(i32 [[COUNT]])
; CHECK: br label %do.body
define void @test1(i1 zeroext %t1, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
entry:
br i1 %t1, label %do.body, label %if.end
do.body: ; preds = %do.body, %entry
%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %entry ]
%a.addr.0 = phi i32* [ %incdec.ptr1, %do.body ], [ %a, %entry ]
%i.0 = phi i32 [ %inc, %do.body ], [ 1, %entry ]
%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
%tmp = load i32, i32* %b.addr.0, align 4
%incdec.ptr1 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
store i32 %tmp, i32* %a.addr.0, align 4
%inc = add nuw i32 %i.0, 1
%cmp = icmp ult i32 %inc, %N
br i1 %cmp, label %do.body, label %if.end
if.end: ; preds = %do.body, %entry
ret void
}
; CHECK-LABEL: test2
; CHECK-NOT: call i1 @llvm.test.set.loop.iterations
; CHECK-NOT: call void @llvm.set.loop.iterations
; CHECK-NOT: call i32 @llvm.start.loop.iterations
define void @test2(i1 zeroext %t1, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
entry:
br i1 %t1, label %do.body, label %if.end
do.body: ; preds = %do.body, %entry
%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %entry ]
%a.addr.0 = phi i32* [ %incdec.ptr1, %do.body ], [ %a, %entry ]
%i.0 = phi i32 [ %add, %do.body ], [ 1, %entry ]
%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
%tmp = load i32, i32* %b.addr.0, align 4
%incdec.ptr1 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
store i32 %tmp, i32* %a.addr.0, align 4
%add = add i32 %i.0, 2
%cmp = icmp ult i32 %add, %N
br i1 %cmp, label %do.body, label %if.end
if.end: ; preds = %do.body, %entry
ret void
}
; CHECK-LABEL: test3
; CHECK: entry:
; CHECK: [[COUNT:%[^ ]+]] = call i32 @llvm.umax.i32(i32 %N, i32 1)
; CHECK: br i1 %brmerge.demorgan, label %do.body.preheader
; CHECK: do.body.preheader:
; CHECK-EXIT: call void @llvm.set.loop.iterations.i32(i32 [[COUNT]])
; CHECK-LATCH: call i32 @llvm.start.loop.iterations.i32(i32 [[COUNT]])
; CHECK: br label %do.body
define void @test3(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
entry:
%brmerge.demorgan = and i1 %t1, %t2
br i1 %brmerge.demorgan, label %do.body, label %if.end
do.body: ; preds = %do.body, %entry
%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %entry ]
%a.addr.0 = phi i32* [ %incdec.ptr3, %do.body ], [ %a, %entry ]
%i.0 = phi i32 [ %inc, %do.body ], [ 0, %entry ]
%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
%tmp = load i32, i32* %b.addr.0, align 4
%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
store i32 %tmp, i32* %a.addr.0, align 4
%inc = add nuw i32 %i.0, 1
%cmp = icmp ult i32 %inc, %N
br i1 %cmp, label %do.body, label %if.end
if.end: ; preds = %do.body, %entry
ret void
}
; CHECK-LABEL: test4
; CHECK: entry:
; CHECK-LATCH: br i1 %brmerge.demorgan, label %while.cond
; CHECK-LATCH-NOT: @llvm{{.*}}loop.iterations
; CHECK-EXIT: br i1 %brmerge.demorgan, label %while.cond.preheader
; CHECK-EXIT: while.cond.preheader:
; CHECK-EXIT: [[COUNT:%[^ ]+]] = add i32 %N, 1
; CHECK-EXIT: call void @llvm.set.loop.iterations.i32(i32 [[COUNT]])
; CHECK-EXIT: br label %while.cond
define void @test4(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
entry:
%brmerge.demorgan = and i1 %t1, %t2
br i1 %brmerge.demorgan, label %while.cond, label %if.end
while.cond: ; preds = %while.body, %entry
%b.addr.0 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %entry ]
%a.addr.0 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %entry ]
%i.0 = phi i32 [ %inc, %while.body ], [ 0, %entry ]
%exitcond = icmp eq i32 %i.0, %N
br i1 %exitcond, label %if.end, label %while.body
while.body: ; preds = %while.cond
%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
%tmp = load i32, i32* %b.addr.0, align 4
%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
store i32 %tmp, i32* %a.addr.0, align 4
%inc = add i32 %i.0, 1
br label %while.cond
if.end: ; preds = %while.cond, %entry
ret void
}
; CHECK-LABEL: test5
; CHECK: entry:
; CHECK: br i1 %or.cond, label %while.body.preheader
; CHECK: while.body.preheader:
; CHECK-EXIT: call void @llvm.set.loop.iterations.i32(i32 %N)
; CHECK-LATCH: call i32 @llvm.start.loop.iterations.i32(i32 %N)
; CHECK: br label %while.body
define void @test5(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
entry:
%brmerge.demorgan = and i1 %t1, %t2
%cmp6 = icmp ne i32 %N, 0
%or.cond = and i1 %brmerge.demorgan, %cmp6
br i1 %or.cond, label %while.body, label %if.end
while.body: ; preds = %while.body, %entry
%i.09 = phi i32 [ %inc, %while.body ], [ 0, %entry ]
%a.addr.08 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %entry ]
%b.addr.07 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %entry ]
%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.07, i32 1
%tmp = load i32, i32* %b.addr.07, align 4
%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.08, i32 1
store i32 %tmp, i32* %a.addr.08, align 4
%inc = add nuw i32 %i.09, 1
%exitcond = icmp eq i32 %inc, %N
br i1 %exitcond, label %if.end, label %while.body
if.end: ; preds = %while.body, %entry
ret void
}
; CHECK-LABEL: test6
; CHECK: entry:
; CHECK: br i1 %brmerge.demorgan, label %while.preheader
; CHECK: while.preheader:
; CHECK: [[TEST:%[^ ]+]] = call i1 @llvm.test.set.loop.iterations.i32(i32 %N)
; CHECK: br i1 [[TEST]], label %while.body.preheader, label %if.end
; CHECK: while.body.preheader:
; CHECK: br label %while.body
define void @test6(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
entry:
%brmerge.demorgan = and i1 %t1, %t2
br i1 %brmerge.demorgan, label %while.preheader, label %if.end
while.preheader: ; preds = %entry
%cmp = icmp ne i32 %N, 0
br i1 %cmp, label %while.body, label %if.end
while.body: ; preds = %while.body, %while.preheader
%i.09 = phi i32 [ %inc, %while.body ], [ 0, %while.preheader ]
%a.addr.08 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %while.preheader ]
%b.addr.07 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %while.preheader ]
%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.07, i32 1
%tmp = load i32, i32* %b.addr.07, align 4
%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.08, i32 1
store i32 %tmp, i32* %a.addr.08, align 4
%inc = add nuw i32 %i.09, 1
%exitcond = icmp eq i32 %inc, %N
br i1 %exitcond, label %if.end, label %while.body
if.end: ; preds = %while.body, %while.preheader, %entry
ret void
}
; CHECK-LABEL: test7
; CHECK: entry:
; CHECK: br i1 %brmerge.demorgan, label %while.preheader
; CHECK: while.preheader:
; CHECK: [[TEST:%[^ ]+]] = call i1 @llvm.test.set.loop.iterations.i32(i32 %N)
; CHECK: br i1 [[TEST]], label %while.body.preheader, label %if.end
; CHECK: while.body.preheader:
; CHECK: br label %while.body
define void @test7(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
entry:
%brmerge.demorgan = and i1 %t1, %t2
br i1 %brmerge.demorgan, label %while.preheader, label %if.end
while.preheader: ; preds = %entry
%cmp = icmp eq i32 %N, 0
br i1 %cmp, label %if.end, label %while.body
while.body: ; preds = %while.body, %while.preheader
%i.09 = phi i32 [ %inc, %while.body ], [ 0, %while.preheader ]
%a.addr.08 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %while.preheader ]
%b.addr.07 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %while.preheader ]
%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.07, i32 1
%tmp = load i32, i32* %b.addr.07, align 4
%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.08, i32 1
store i32 %tmp, i32* %a.addr.08, align 4
%inc = add nuw i32 %i.09, 1
%exitcond = icmp eq i32 %inc, %N
br i1 %exitcond, label %if.end, label %while.body
if.end: ; preds = %while.body, %while.preheader, %entry
ret void
}
; TODO: Can we rearrange the conditional blocks so that we can use the test form?
; CHECK-LABEL: test8
; CHECK: entry:
; CHECK: [[CMP:%[^ ]+]] = icmp ne i32 %N, 0
; CHECK: br i1 [[CMP]], label %while.preheader
; CHECK: while.preheader:
; CHECK: br i1 %brmerge.demorgan, label %while.body.preheader
; CHECK: while.body.preheader:
; CHECK-EXIT: call void @llvm.set.loop.iterations.i32(i32 %N)
; CHECK-LATCH: call i32 @llvm.start.loop.iterations.i32(i32 %N)
; CHECK: br label %while.body
define void @test8(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
entry:
%cmp = icmp ne i32 %N, 0
br i1 %cmp, label %while.preheader, label %if.end
while.preheader: ; preds = %entry
%brmerge.demorgan = and i1 %t1, %t2
br i1 %brmerge.demorgan, label %while.body, label %if.end
while.body: ; preds = %while.body, %while.preheader
%i.09 = phi i32 [ %inc, %while.body ], [ 0, %while.preheader ]
%a.addr.08 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %while.preheader ]
%b.addr.07 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %while.preheader ]
%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.07, i32 1
%tmp = load i32, i32* %b.addr.07, align 4
%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.08, i32 1
store i32 %tmp, i32* %a.addr.08, align 4
%inc = add nuw i32 %i.09, 1
%exitcond = icmp eq i32 %inc, %N
br i1 %exitcond, label %if.end, label %while.body
if.end: ; preds = %while.body, %while.preheader, %entry
ret void
}
; CHECK-LABEL: test9
; CHECK: entry:
; CHECK: br i1 %brmerge.demorgan, label %do.body.preheader
; CHECK: do.body.preheader:
; CHECK-EXIT: call void @llvm.set.loop.iterations.i32(i32 %N)
; CHECK-LATCH: call i32 @llvm.start.loop.iterations.i32(i32 %N)
; CHECK: br label %do.body
define void @test9(i1 zeroext %t1, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
entry:
%cmp = icmp ne i32 %N, 0
%brmerge.demorgan = and i1 %t1, %cmp
br i1 %brmerge.demorgan, label %do.body, label %if.end
do.body: ; preds = %do.body, %entry
%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %entry ]
%a.addr.0 = phi i32* [ %incdec.ptr3, %do.body ], [ %a, %entry ]
%i.0 = phi i32 [ %inc, %do.body ], [ 0, %entry ]
%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
%tmp = load i32, i32* %b.addr.0, align 4
%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
store i32 %tmp, i32* %a.addr.0, align 4
%inc = add nuw i32 %i.0, 1
%cmp.1 = icmp ult i32 %inc, %N
br i1 %cmp.1, label %do.body, label %if.end
if.end: ; preds = %do.body, %entry
ret void
}
; CHECK-LABEL: test10
; CHECK: entry:
; CHECK: br i1 %cmp.1, label %do.body.preheader
; CHECK: do.body.preheader:
; CHECK-EXIT: call void @llvm.set.loop.iterations.i32(i32
; CHECK-LATCH: call i32 @llvm.start.loop.iterations.i32(i32
; CHECK: br label %do.body
define void @test10(i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
entry:
%cmp = icmp ne i32 %N, 0
%sub = sub i32 %N, 1
%be = select i1 %cmp, i32 0, i32 %sub
%cmp.1 = icmp ne i32 %be, 0
br i1 %cmp.1, label %do.body, label %if.end
do.body: ; preds = %do.body, %entry
%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %entry ]
%a.addr.0 = phi i32* [ %incdec.ptr3, %do.body ], [ %a, %entry ]
%i.0 = phi i32 [ %inc, %do.body ], [ 0, %entry ]
%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
%tmp = load i32, i32* %b.addr.0, align 4
%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
store i32 %tmp, i32* %a.addr.0, align 4
%inc = add nuw i32 %i.0, 1
%cmp.2 = icmp ult i32 %inc, %N
br i1 %cmp.2, label %do.body, label %if.end
if.end: ; preds = %do.body, %entry
ret void
}
; CHECK-LABEL: test11
; CHECK: entry:
; CHECK: br label %do.body.preheader
; CHECK: do.body.preheader:
; CHECK: [[TEST:%[^ ]+]] = call i1 @llvm.test.set.loop.iterations.i32(i32 %N)
; CHECK: br i1 [[TEST]], label %do.body.preheader1, label %if.end
; CHECK: do.body.preheader1:
; CHECK: br label %do.body
define void @test11(i1 zeroext %t1, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
entry:
br label %do.body.preheader
do.body.preheader:
%cmp = icmp ne i32 %N, 0
br i1 %cmp, label %do.body, label %if.end
do.body:
%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %do.body.preheader ]
%a.addr.0 = phi i32* [ %incdec.ptr3, %do.body ], [ %a, %do.body.preheader ]
%i.0 = phi i32 [ %inc, %do.body ], [ 0, %do.body.preheader ]
%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
%tmp = load i32, i32* %b.addr.0, align 4
%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
store i32 %tmp, i32* %a.addr.0, align 4
%inc = add nuw i32 %i.0, 1
%cmp.1 = icmp ult i32 %inc, %N
br i1 %cmp.1, label %do.body, label %if.end
if.end: ; preds = %do.body, %entry
ret void
}
Reference in New Issue View Git Blame Copy Permalink