Matthias Springer 43198b0aa2 [mlir][bufferization] Better analysis around allocs and block arguments (#67923) ...

Values that are the result of buffer allocation ops are guaranteed to
*not* be the same allocation as block arguments of containing blocks.
This fact can be used to allow for more aggressive simplification of
`bufferization.dealloc` ops.

2023-10-02 11:01:12 +02:00

..

Affine

[mlir][affine] Check the input vector sizes to be greater than 0 (#65293)

2023-10-02 09:52:00 +09:00

AMDGPU

[mlir][AMDGPU] Add packed 8-bit float conversion ops and lowering

2023-09-28 14:44:16 +00:00

AMX

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Arith

[mlir][vector] add result type to vector.extract assembly format (#66499)

2023-09-28 11:11:16 +01:00

ArmNeon

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ArmSME

[mlir][ArmSME] Add arm_sme.move_tile_slice_to_vector op (#67652)

2023-09-29 10:33:09 +01:00

ArmSVE

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Async

Splits cleanup block lowered by AsyncToAsyncRuntime. (#66123)

2023-09-12 11:42:16 -07:00

Bufferization

[mlir][bufferization] Better analysis around allocs and block arguments (#67923)

2023-10-02 11:01:12 +02:00

Builtin

[mlir] Add a builtin distinct attribute

2023-07-11 07:33:16 +00:00

Complex

[mlir][complex] Add a complex.bitcast operation

2023-07-06 16:21:57 -07:00

ControlFlow

[mlir][bufferization] Remove allow-return-allocs and create-deallocs pass options, remove bufferization.escape attribute (#66619)

2023-09-18 16:44:48 +02:00

DLTI

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EmitC

Recommit "Add a structured if operation (#67234)"

2023-09-28 01:52:30 +03:00

Func

[MLIR] Don't sort operand of commutative ops when comparing two ops as there is a correctness issue

2023-07-14 16:11:54 -07:00

GPU

[mlir][sparse][gpu] add CSC and BSR format to cuSparse GPU ops (#67509)

2023-09-27 09:32:25 -07:00

Index

[mlir][index] Implement folders for CastSOp and CastUOp (#66960)

2023-09-21 11:53:43 -07:00

IRDL

[mlir][irdl] Introduce a way to define regions

2023-08-23 17:55:10 +03:00

Linalg

[mlir][Linalg] Fix SoftmaxOp's reify result shape calculation (#67790)

2023-09-29 10:55:35 -07:00

LLVM

[mlir] cleanup of structured.tile* transform ops (#67320)

2023-09-26 09:14:29 +02:00

LLVMIR

[mlir][AMDGPU] Add packed 8-bit float conversion ops and lowering

2023-09-28 14:44:16 +00:00

Math

[mlir][vector] add result type to vector.extract assembly format (#66499)

2023-09-28 11:11:16 +01:00

MemRef

[mlir][memref][transform] Add new alloca_to_global op. (#66511)

2023-09-21 18:17:00 +02:00

MLProgram

[mlir][mlprogram] Add mlprogram-pipeline-globals optimization pass

2023-09-18 17:11:29 -07:00

NVGPU

[mlir][vector] add result type to vector.extract assembly format (#66499)

2023-09-28 11:11:16 +01:00

OpenACC

[mlir][openacc] Model acc cache directive as data entry operands on acc.loop (#65521)

2023-09-11 13:38:03 -07:00

OpenMP

[OpenMP][MLIR] Refactor and extend current map support by adding MapInfoOp and DataBoundsOp operations to the OpenMP Dialect

2023-09-19 08:26:46 -05:00

PDL

Finish renaming getOperandSegmentSizeAttr() from operand_segment_sizes to operandSegmentSizes

2023-08-09 19:37:01 -07:00

PDLInterp

Finish renaming getOperandSegmentSizeAttr() from operand_segment_sizes to operandSegmentSizes

2023-08-09 19:37:01 -07:00

Quant

Fix bytecode reader/writer on big-endian platforms

2023-06-23 09:22:55 +02:00

SCF

[mlir][SCF] Bufferize scf.index_switch (#67666)

2023-09-28 19:05:14 +02:00

Shape

[mlir][ub] Add poison support to CommonFolders.h

2023-09-07 12:30:29 +02:00

SparseTensor

[mlir][sparse] rename sparse_tensor.(un)pack to sparse_tensor.(dis)as… (#67717)

2023-09-28 11:01:10 -07:00

SPIRV

[mlir][spirv] Implement missing validation rules for ptr variables (#67871)

2023-09-30 00:21:28 -04:00

Tensor

[mlir] cleanup of structured.tile* transform ops (#67320)

2023-09-26 09:14:29 +02:00

Tosa

[mlir][TOSA] Fix shape inference when operand was inferred (#66906)

2023-09-22 14:09:50 -07:00

Transform

[mlir][transform] Fix crash when consuming an op in a named sequence (#67437)

2023-09-27 12:40:41 +02:00

UB

[MLIR][UB] Add inliner interface for UB dialect (#67115)

2023-09-22 14:07:47 +02:00

Vector

[mlir][vector] don't emit non-rank 1 masked load and store (#67656)

2023-09-28 13:06:50 +01:00

X86Vector

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traits.mlir

Released restriction that prevented implicit dynamic-to-static dimension type cast in TOSA ops.

2023-08-01 08:57:08 -07:00