c3ec80fea1
This provides an optimized implementation of SADDO/SSUBO/UADDO/USUBO as well as ADDCARRY/SUBCARRY on top of the new CC implementation. In particular, multi-word arithmetic now uses UADDO/ADDCARRY instead of the old ADDC/ADDE logic, which means we no longer need to use "glue" links for those instructions. This also allows making full use of the memory-based instructions like ALSI, which couldn't be recognized due to limitations in the DAG matcher previously. Also, the llvm.sadd.with.overflow et.al. intrinsincs now expand to directly using the ADD instructions and checking for a CC 3 result. llvm-svn: 331203
157 lines
4.5 KiB
LLVM
157 lines
4.5 KiB
LLVM
; Test 128-bit subtraction in which the second operand is variable.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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declare i128 *@foo()
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; Test register addition.
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define void @f1(i128 *%ptr, i64 %high, i64 %low) {
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; CHECK-LABEL: f1:
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; CHECK: slgr {{%r[0-5]}}, %r4
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; CHECK: slbgr {{%r[0-5]}}, %r3
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; CHECK: br %r14
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%a = load i128 , i128 *%ptr
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%highx = zext i64 %high to i128
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%lowx = zext i64 %low to i128
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%bhigh = shl i128 %highx, 64
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%b = or i128 %bhigh, %lowx
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%sub = sub i128 %a, %b
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store i128 %sub, i128 *%ptr
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ret void
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}
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; Test memory addition with no offset.
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define void @f2(i64 %addr) {
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; CHECK-LABEL: f2:
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; CHECK: slg {{%r[0-5]}}, 8(%r2)
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; CHECK: slbg {{%r[0-5]}}, 0(%r2)
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; CHECK: br %r14
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%bptr = inttoptr i64 %addr to i128 *
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%aptr = getelementptr i128, i128 *%bptr, i64 -8
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%a = load i128 , i128 *%aptr
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%b = load i128 , i128 *%bptr
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%sub = sub i128 %a, %b
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store i128 %sub, i128 *%aptr
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ret void
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}
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; Test the highest aligned offset that is in range of both SLG and SLBG.
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define void @f3(i64 %base) {
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; CHECK-LABEL: f3:
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; CHECK: slg {{%r[0-5]}}, 524280(%r2)
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; CHECK: slbg {{%r[0-5]}}, 524272(%r2)
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; CHECK: br %r14
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%addr = add i64 %base, 524272
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%bptr = inttoptr i64 %addr to i128 *
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%aptr = getelementptr i128, i128 *%bptr, i64 -8
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%a = load i128 , i128 *%aptr
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%b = load i128 , i128 *%bptr
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%sub = sub i128 %a, %b
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store i128 %sub, i128 *%aptr
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ret void
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}
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; Test the next doubleword up, which requires separate address logic for SLG.
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define void @f4(i64 %base) {
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; CHECK-LABEL: f4:
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; CHECK: lgr [[BASE:%r[1-5]]], %r2
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; CHECK: agfi [[BASE]], 524288
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; CHECK: slg {{%r[0-5]}}, 0([[BASE]])
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; CHECK: slbg {{%r[0-5]}}, 524280(%r2)
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; CHECK: br %r14
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%addr = add i64 %base, 524280
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%bptr = inttoptr i64 %addr to i128 *
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%aptr = getelementptr i128, i128 *%bptr, i64 -8
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%a = load i128 , i128 *%aptr
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%b = load i128 , i128 *%bptr
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%sub = sub i128 %a, %b
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store i128 %sub, i128 *%aptr
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ret void
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}
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; Test the next doubleword after that, which requires separate logic for
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; both instructions. It would be better to create an anchor at 524288
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; that both instructions can use, but that isn't implemented yet.
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define void @f5(i64 %base) {
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; CHECK-LABEL: f5:
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; CHECK: slg {{%r[0-5]}}, 0({{%r[1-5]}})
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; CHECK: slbg {{%r[0-5]}}, 0({{%r[1-5]}})
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; CHECK: br %r14
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%addr = add i64 %base, 524288
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%bptr = inttoptr i64 %addr to i128 *
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%aptr = getelementptr i128, i128 *%bptr, i64 -8
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%a = load i128 , i128 *%aptr
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%b = load i128 , i128 *%bptr
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%sub = sub i128 %a, %b
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store i128 %sub, i128 *%aptr
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ret void
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}
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; Test the lowest displacement that is in range of both SLG and SLBG.
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define void @f6(i64 %base) {
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; CHECK-LABEL: f6:
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; CHECK: slg {{%r[0-5]}}, -524280(%r2)
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; CHECK: slbg {{%r[0-5]}}, -524288(%r2)
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; CHECK: br %r14
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%addr = add i64 %base, -524288
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%bptr = inttoptr i64 %addr to i128 *
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%aptr = getelementptr i128, i128 *%bptr, i64 -8
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%a = load i128 , i128 *%aptr
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%b = load i128 , i128 *%bptr
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%sub = sub i128 %a, %b
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store i128 %sub, i128 *%aptr
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ret void
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}
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; Test the next doubleword down, which is out of range of the SLBG.
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define void @f7(i64 %base) {
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; CHECK-LABEL: f7:
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; CHECK: slg {{%r[0-5]}}, -524288(%r2)
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; CHECK: slbg {{%r[0-5]}}, 0({{%r[1-5]}})
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; CHECK: br %r14
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%addr = add i64 %base, -524296
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%bptr = inttoptr i64 %addr to i128 *
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%aptr = getelementptr i128, i128 *%bptr, i64 -8
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%a = load i128 , i128 *%aptr
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%b = load i128 , i128 *%bptr
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%sub = sub i128 %a, %b
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store i128 %sub, i128 *%aptr
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ret void
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}
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; Check that subtractions of spilled values can use SLG and SLBG rather than
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; SLGR and SLBGR.
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define void @f8(i128 *%ptr0) {
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; CHECK-LABEL: f8:
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; CHECK: brasl %r14, foo@PLT
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; CHECK: slg {{%r[0-9]+}}, {{[0-9]+}}(%r15)
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; CHECK: slbg {{%r[0-9]+}}, {{[0-9]+}}(%r15)
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; CHECK: br %r14
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%ptr1 = getelementptr i128, i128 *%ptr0, i128 2
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%ptr2 = getelementptr i128, i128 *%ptr0, i128 4
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%ptr3 = getelementptr i128, i128 *%ptr0, i128 6
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%ptr4 = getelementptr i128, i128 *%ptr0, i128 8
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%ptr5 = getelementptr i128, i128 *%ptr0, i128 10
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%val0 = load i128 , i128 *%ptr0
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%val1 = load i128 , i128 *%ptr1
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%val2 = load i128 , i128 *%ptr2
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%val3 = load i128 , i128 *%ptr3
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%val4 = load i128 , i128 *%ptr4
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%val5 = load i128 , i128 *%ptr5
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%retptr = call i128 *@foo()
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%ret = load i128 , i128 *%retptr
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%sub0 = sub i128 %ret, %val0
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%sub1 = sub i128 %sub0, %val1
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%sub2 = sub i128 %sub1, %val2
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%sub3 = sub i128 %sub2, %val3
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%sub4 = sub i128 %sub3, %val4
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%sub5 = sub i128 %sub4, %val5
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store i128 %sub5, i128 *%retptr
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ret void
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}
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