71f8b441ed
By storing possible test vectors instead of combinations of conditions, the restriction is dramatically relaxed. This introduces two options to `cc1`: * `-fmcdc-max-conditions=32767` * `-fmcdc-max-test-vectors=2147483646` This change makes coverage mapping, profraw, and profdata incompatible with Clang-18. - Bitmap semantics changed. It is incompatible with previous format. - `BitmapIdx` in `Decision` points to the end of the bitmap. - Bitmap is packed per function. - `llvm-cov` can understand `profdata` generated by `llvm-profdata-18`. RFC: https://discourse.llvm.org/t/rfc-coverage-new-algorithm-and-file-format-for-mc-dc/76798 -- Change(s) since llvmorg-19-init-14288-g7ead2d8c7e91 - Update compiler-rt/test/profile/ContinuousSyncMode/image-with-mcdc.c
53 lines
2.3 KiB
LLVM
53 lines
2.3 KiB
LLVM
; Check that MC/DC intrinsics are properly lowered
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; RUN: opt < %s -passes=instrprof -S | FileCheck %s
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; RUN: opt < %s -passes=instrprof -runtime-counter-relocation -S 2>&1 | FileCheck %s --check-prefix RELOC
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; RELOC: Runtime counter relocation is presently not supported for MC/DC bitmaps
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target triple = "x86_64-unknown-linux-gnu"
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@__profn_test = private constant [4 x i8] c"test"
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; CHECK: @__profbm_test = private global [1 x i8] zeroinitializer, section "__llvm_prf_bits", comdat, align 1
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define dso_local void @test(i32 noundef %A) {
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entry:
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%A.addr = alloca i32, align 4
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%mcdc.addr = alloca i32, align 4
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call void @llvm.instrprof.cover(ptr @__profn_test, i64 99278, i32 5, i32 0)
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; CHECK: store i8 0, ptr @__profc_test, align 1
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call void @llvm.instrprof.mcdc.parameters(ptr @__profn_test, i64 99278, i32 1)
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store i32 0, ptr %mcdc.addr, align 4
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%0 = load i32, ptr %A.addr, align 4
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%tobool = icmp ne i32 %0, 0
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call void @llvm.instrprof.mcdc.condbitmap.update(ptr @__profn_test, i64 99278, i32 0, ptr %mcdc.addr, i1 %tobool)
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; CHECK: %[[TEMP:mcdc.*]] = load i32, ptr %mcdc.addr, align 4
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; CHECK-NEXT: %[[LAB1:[0-9]+]] = zext i1 %tobool to i32
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; CHECK-NEXT: %[[LAB2:[0-9]+]] = shl i32 %[[LAB1]], 0
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; CHECK-NEXT: %[[LAB3:[0-9]+]] = or i32 %[[TEMP]], %[[LAB2]]
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; CHECK-NEXT: store i32 %[[LAB3]], ptr %mcdc.addr, align 4
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call void @llvm.instrprof.mcdc.tvbitmap.update(ptr @__profn_test, i64 99278, i32 1, i32 0, ptr %mcdc.addr)
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; CHECK: %[[TEMP0:mcdc.*]] = load i32, ptr %mcdc.addr, align 4
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; CHECK-NEXT: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 0
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; CHECK-NEXT: %[[LAB4:[0-9]+]] = lshr i32 %[[TEMP]], 3
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; CHECK-NEXT: %[[LAB7:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB4]]
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; CHECK-NEXT: %[[LAB8:[0-9]+]] = and i32 %[[TEMP]], 7
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; CHECK-NEXT: %[[LAB9:[0-9]+]] = trunc i32 %[[LAB8]] to i8
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; CHECK-NEXT: %[[LAB10:[0-9]+]] = shl i8 1, %[[LAB9]]
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; CHECK-NEXT: %[[BITS:mcdc.*]] = load i8, ptr %[[LAB7]], align 1
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; CHECK-NEXT: %[[LAB11:[0-9]+]] = or i8 %[[BITS]], %[[LAB10]]
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; CHECK-NEXT: store i8 %[[LAB11]], ptr %[[LAB7]], align 1
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ret void
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}
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declare void @llvm.instrprof.cover(ptr, i64, i32, i32)
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declare void @llvm.instrprof.mcdc.parameters(ptr, i64, i32)
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declare void @llvm.instrprof.mcdc.condbitmap.update(ptr, i64, i32, ptr, i1)
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declare void @llvm.instrprof.mcdc.tvbitmap.update(ptr, i64, i32, i32, ptr)
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