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clang-p2996/llvm/lib/CodeGen/GlobalISel
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Simon Pilgrim 7fe7c6d3be [GlobalISel] Don't use Register type for getNumOperands(). NFCI. 
Copy+Paste typo - we were storing getNumOperands() opcounts in a Register type instead of just an unsigned.
2020-11-05 17:12:58 +00:00
..
CallLowering.cpp
[SVE][CodeGen][NFC] Replace TypeSize comparison operators with their scalar equivalents
2020-10-19 08:30:31 +01:00
CMakeLists.txt
…
Combiner.cpp
[GlobalISel] fix a compilation error with gcc 6.3.0
2020-08-28 09:16:52 -07:00
CombinerHelper.cpp
[GISel]: Few InsertVecElt combines
2020-10-28 12:27:07 -07:00
CSEInfo.cpp
[GISel]: Fix one more CSE Non determinism
2020-08-27 09:06:21 -07:00
CSEMIRBuilder.cpp
[GlobalISel] Fix CSEMIRBuilder silently allowing use-before-def.
2020-10-05 11:00:00 -07:00
GISelChangeObserver.cpp
GlobalISel: Use Register
2020-08-19 13:45:31 -04:00
GISelKnownBits.cpp
[GlobalISel] Don't use Register type for getNumOperands(). NFCI.
2020-11-05 17:12:58 +00:00
GlobalISel.cpp
…
InlineAsmLowering.cpp
[GlobalISel][InlineAsm] Fix matching input constraint to physreg
2020-08-06 14:35:51 +02:00
InstructionSelect.cpp
GlobalISel: Move finalizeLowering call later
2020-07-06 09:19:40 -04:00
InstructionSelector.cpp
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IRTranslator.cpp
[GlobalISel] Add translation support for vector reduction intrinsics.
2020-10-16 10:17:53 -07:00
LegalityPredicates.cpp
Fix wrong comment about enabling optimizations to work around a bug
2020-09-10 16:45:20 -07:00
LegalizeMutations.cpp
GlobalISel: Add scalarSameSizeAs LegalizeRule
2020-07-23 21:17:31 -04:00
Legalizer.cpp
GlobalISel: Improve dead instruction debug printing
2020-08-24 10:12:00 -04:00
LegalizerHelper.cpp
[GlobalISel] Fix multiply with overflow intrinsics legalization generating invalid MIR.
2020-09-29 18:40:58 -07:00
LegalizerInfo.cpp
GlobalISel: Assert if MoreElements uses a non-vector type
2020-09-30 10:36:00 -04:00
LLVMBuild.txt
…
Localizer.cpp
…
LostDebugLocObserver.cpp
Give helpers internal linkage. NFC.
2020-04-25 11:50:52 +02:00
MachineIRBuilder.cpp
[GlobalISel] Implement bit-test switch table optimization.
2020-08-12 11:31:39 -07:00
RegBankSelect.cpp
[GlobalISel][InlineAsm] Add support for basic output operand constraints
2020-05-06 10:06:13 +02:00
RegisterBank.cpp
…
RegisterBankInfo.cpp
…
Utils.cpp
AMDGPU/GlobalISel Check for NoNaNsFPMath in isKnownNeverSNaN
2020-09-14 12:11:00 +02:00