c23a780c30
And a small utilities -- extract-section.py -- that helps extracting specific object file section and printing in textual format. This utility is just a workaround for tests inside `Encoding`. Hopefully in the future we can replace dependencies in those tests with existing tools (e.g. llvm-readobj). Please refer to this bug for more context: https://bugs.llvm.org/show_bug.cgi?id=49245 Note that since we don't have AsmParser for now, we are testing the MC part using MIR as input and put those tests under the `Encoding` folder. In the future when AsmParser (and disassembler) is finished, those tests will be moved to `test/MC/M68k`. Authors: myhsu, m4yers, glaubitz Differential Revision: https://reviews.llvm.org/D88392
31 lines
1.6 KiB
YAML
31 lines
1.6 KiB
YAML
# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
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# RUN: | extract-section .text \
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# RUN: | FileCheck %s -check-prefixes=MOV8DD,MOV16RA,MOV32RR
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#------------------------------------------------------------------------------
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# MxMove_RR moves data from register to register
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#------------------------------------------------------------------------------
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# ---------------------------+-----------+-----------+-----------
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# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
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# -------+-------+-----------+-----------+-----------+-----------
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# | | DESTINATION | SOURCE
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# 0 0 | SIZE | REG | MODE | MODE | REG
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# -------+-------+-----------+-----------+-----------+-----------
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# MOV8DD: 0 0 0 1 0 0 1 0 . 0 0 0 0 0 0 0 0
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# MOV16RA-SAME: 0 0 1 1 0 1 1 0 . 0 0 0 0 1 0 1 0
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# MOV16RA-SAME: 0 0 1 1 1 1 0 0 . 0 1 0 0 1 0 1 0
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# MOV16RA-SAME: 0 0 1 1 0 0 1 0 . 0 0 0 0 1 0 1 0
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# MOV32RR-SAME: 0 0 1 0 0 0 1 0 . 0 0 0 0 0 0 1 0
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# MOV32RR-SAME: 0 0 1 0 0 0 1 0 . 0 1 0 0 1 0 1 0
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name: MxMove_RR
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body: |
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bb.0:
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$bd1 = MOV8dd $bd0, implicit-def $ccr
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$wd3 = MOV16ra $wa2, implicit-def $ccr
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$wa6 = MOV16ra $wa2, implicit-def $ccr
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$wd1 = MOV16ra $wa2, implicit-def $ccr
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$d1 = MOV32rr $d2, implicit-def $ccr
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$a1 = MOV32rr $a2, implicit-def $ccr
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