Craig Topper 4abb722ffa [RISCV] Add tests for opportunities to reassociate to form more shXadd instructions. NFC ...

These tests consist of patterns like (sh3add Z, (add X, (slli Y, 6)))
that can be reassociated to form (sh3add (sh3add Y, Z), X).

2024-04-05 12:50:48 -07:00

..

GlobalISel

[RISCV][GISEL] Instruction selection for G_ZEXT, G_SEXT, and G_ANYEXT with scalable vector type

2024-04-03 15:56:08 -07:00

intrinsics

…

rv64-legal-i32

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

rvv

[RISCV] Add tests for vwsll for extends > .vf2. NFC

2024-04-04 18:43:15 +08:00

add-before-shl.ll

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"

2023-10-09 12:31:32 +01:00

add-imm.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

addc-adde-sube-subc.ll

…

addcarry.ll

…

addimm-mulimm.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

addrspacecast.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

aext-to-sext.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

aext.ll

Add RV64 constraint to SRLIW (#69416)

2023-10-18 15:01:17 +08:00

align-loops.ll

[RISCV] Add searchable table for tune information (#66193)

2023-09-26 12:26:35 +08:00

align.ll

[RISCV] Add searchable table for tune information (#66193)

2023-09-26 12:26:35 +08:00

alloca.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

allow-check.ll

[CodeGen] Add default lowering for llvm.allow.{runtime,ubsan}.check() (#86049)

2024-03-31 22:19:33 -07:00

alu8.ll

…

alu16.ll

…

alu32.ll

…

alu64.ll

[SelectionDAG] Allow FREEZE to be hoisted before integer SETCC. (#84241)

2024-03-08 10:17:54 -08:00

analyze-branch.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

and-add-lsr.ll

[DAG] Avoid a crash when checking size of scalable type in visitANDLike

2024-02-05 14:30:10 -08:00

and.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

arith-with-overflow.ll

…

atomic-cmpxchg-branch-on-result.ll

[RISCV] Remove experimental from Zacas. (#83195)

2024-02-28 21:46:58 -08:00

atomic-cmpxchg-flag.ll

…

atomic-cmpxchg.ll

[RISCV] Remove experimental from Zacas. (#83195)

2024-02-28 21:46:58 -08:00

atomic-fence.ll

…

atomic-load-store.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

atomic-rmw-discard.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

atomic-rmw-sub.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

atomic-rmw.ll

[RISCV] Remove experimental from Zacas. (#83195)

2024-02-28 21:46:58 -08:00

atomic-signext.ll

[RISCV] Remove experimental from Zacas. (#83195)

2024-02-28 21:46:58 -08:00

atomicrmw-uinc-udec-wrap.ll

[RISCV] Insert a freeze before converting select to AND/OR. (#84232)

2024-03-07 15:03:51 -08:00

attributes-module-flag.ll

[RISCV] Use 'riscv-isa' module flag to set ELF flags and attributes. (#85155)

2024-03-20 11:35:19 -07:00

attributes.ll

[RISCV] Add support of Sscofpmf (#83831)

2024-03-05 10:45:13 +08:00

bf16-promote.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

bfloat-arith.ll

…

bfloat-br-fcmp.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

bfloat-convert.ll

[SelectionDAG] Allow FREEZE to be hoisted before FP SETCC. (#84358)

2024-03-08 17:21:21 -08:00

bfloat-fcmp.ll

…

bfloat-frem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

bfloat-imm.ll

…

bfloat-isnan.ll

…

bfloat-mem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

bfloat-select-fcmp.ll

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"

2023-10-09 12:31:32 +01:00

bfloat-select-icmp.ll

…

bfloat.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

bitextract-mac.ll

…

bitreverse-shift.ll

…

bittest.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

blockaddress.ll

…

branch_zero.ll

…

branch-on-zero.ll

Revert "[LSR][TTI][RISCV] Disable terminator folding for RISC-V."

2024-01-11 13:20:02 -08:00

branch-opt.ll

[RISCV] CSE by swapping conditional branches (#71111)

2023-11-03 09:03:52 -07:00

branch-opt.mir

[RISCV] Make sure ADDI replacement in optimizeCondBranch has a virtual reg destination. (#81938)

2024-02-15 16:34:40 -08:00

branch-relaxation.ll

BlockFrequencyInfoImpl: Avoid big numbers, increase precision for small spreads

2023-10-24 20:27:39 -07:00

branch.ll

[RISCV] Add a pass to rewrite rd to x0 for non-computational instrs whose return values are unused

2023-09-20 01:02:19 +08:00

bswap-bitreverse.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

bswap-shift.ll

…

byval.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

callee-saved-fpr32s.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

callee-saved-fpr64s.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

callee-saved-gprs.ll

[RISCV] Lower the TransientStackAlignment to the ABI alignment for rv32e/rv64e.

2024-02-09 21:48:11 -08:00

calling-conv-half.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-ilp32-ilp32f-common.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-ilp32-ilp32f-ilp32d-common.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-ilp32.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-ilp32d.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-ilp32e.ll

[RISCV] Register fixed stack slots for callee saved registers for -msave-restore/Zcmp (#81392)

2024-02-13 14:59:28 -08:00

calling-conv-ilp32f-ilp32d-common.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-lp64-lp64f-common.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-lp64-lp64f-lp64d-common.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-lp64.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-lp64e.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

calling-conv-rv32f-ilp32.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-rv32f-ilp32e.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

calling-conv-sext-zext.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-vector-float.ll

[clang][RISCV] Change default abi with f extension but without d extension (#73489)

2023-12-15 11:16:05 +08:00

calling-conv-vector-on-stack.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calls.ll

[RISCV][NFC] Simplify calls.ll and autogenerate checks for tail-calls.ll

2024-02-01 20:50:20 +08:00

cm_mvas_mvsa.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

cm_mvas_mvsa.mir

[RISCV] Add scheduling info for Zcmp (#82719)

2024-02-23 15:44:57 -08:00

cmov-branch-opt.ll

[RISCV] Graduate Zicond to non-experimental (#79811)

2024-01-29 15:58:54 +00:00

cmp-bool.ll

…

codemodel-lowering.ll

[RISCV] Fix the float value to test constantpool lowering under differe… (#67297)

2023-09-26 09:06:49 +08:00

compress-double.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

compress-float.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

compress-inline-asm.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

compress-opt-branch.ll

[RISCV] Add Zca predicate to BrccCompressOpt patterns used for MinSize.

2024-04-05 12:39:39 -07:00

compress-opt-select.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

compress.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

condbinops.ll

[RISCV] Graduate Zicond to non-experimental (#79811)

2024-01-29 15:58:54 +00:00

condops.ll

[RISCV] Use APInt in useInversedSetcc to prevent crashes when mask is larger than UINT64_MAX. (#81888)

2024-02-15 10:48:52 -08:00

copy-frameindex.mir

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

copyprop.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

copysign-casts.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

ctlz-cttz-ctpop.ll

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

ctz_zero_return_test.ll

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

disable-tail-calls.ll

…

disjoint.ll

…

div_minsize.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

div-by-constant.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

div-pow2.ll

…

div.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

double_reduct.ll

[RISCV] Remove unecessary early exit in transferBefore (#74040)

2023-12-12 17:25:19 +09:00

double-arith-strict.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-arith.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-bitmanip-dagcombines.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-br-fcmp.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-calling-conv.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-convert-strict.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-convert.ll

[RISCV] Add integer RISCVISD::SELECT_CC to canCreateUndefOrPoison and isGuaranteedNotToBeUndefOrPoison. (#84693)

2024-03-25 11:10:58 -07:00

double-fcmp-strict.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-fcmp.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-frem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

double-imm.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-intrinsics-strict.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-intrinsics.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-isnan.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-maximum-minimum.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-mem.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-previous-failure.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-round-conv-sat.ll

[RISCV] Add integer RISCVISD::SELECT_CC to canCreateUndefOrPoison and isGuaranteedNotToBeUndefOrPoison. (#84693)

2024-03-25 11:10:58 -07:00

double-round-conv.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-select-fcmp.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-select-icmp.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-stack-spill-restore.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-zfa.ll

[RISCV] Use FLI + FNEG to materialize some negative FP constants (#70825)

2023-10-31 17:52:50 -07:00

dso_local_equivalent.ll

…

dwarf-eh.ll

[test] Change llc -march= to -mtriple= & llvm-mc -arch= to -triple=

2023-09-11 15:11:01 -07:00

early-clobber-tied-def-subreg-liveness.ll

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"

2023-10-09 12:31:32 +01:00

eh-dwarf-cfa.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

elf-preemption.ll

…

emutls.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

exception-pointer-register.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

fastcc-float.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

fastcc-int.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

fastcc-without-f-reg.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

fixups-diff.ll

…

fli-licm.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

float-arith-strict.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-arith.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-bit-preserving-dagcombines.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-bitmanip-dagcombines.ll

[clang][RISCV] Change default abi with f extension but without d extension (#73489)

2023-12-15 11:16:05 +08:00

float-br-fcmp.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-convert-strict.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-convert.ll

[RISCV] Add integer RISCVISD::SELECT_CC to canCreateUndefOrPoison and isGuaranteedNotToBeUndefOrPoison. (#84693)

2024-03-25 11:10:58 -07:00

float-fcmp-strict.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-fcmp.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-frem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-imm.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

float-intrinsics-strict.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-intrinsics.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-isnan.ll

…

float-maximum-minimum.ll

…

float-mem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-round-conv-sat.ll

[RISCV] Add integer RISCVISD::SELECT_CC to canCreateUndefOrPoison and isGuaranteedNotToBeUndefOrPoison. (#84693)

2024-03-25 11:10:58 -07:00

float-round-conv.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-select-fcmp.ll

…

float-select-icmp.ll

…

float-select-verify.ll

[MIRPrinter] Don't print line break when there is no instructions (NFC) (#80147)

2024-02-01 22:10:52 +08:00

float-zfa.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

flt-rounds.ll

…

fmax-fmin.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

fold-addi-loadstore.ll

[RISCV] Enable -riscv-enable-sink-fold by default. (#82026)

2024-02-22 09:07:21 -08:00

fold-binop-into-select.ll

…

forced-atomics.ll

[SelectionDAG] Allow FREEZE to be hoisted before integer SETCC. (#84241)

2024-03-08 10:17:54 -08:00

fp16-promote.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

fp128.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

fpclamptosat.ll

[SelectionDAG] Allow FREEZE to be hoisted before integer SETCC. (#84241)

2024-03-08 10:17:54 -08:00

fpenv.ll

…

frame-info.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

frame.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

frameaddr-returnaddr.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

frm-dependency.ll

…

get-register-invalid.ll

…

get-register-noreserve.ll

…

get-register-reserve.ll

…

get-setcc-result-type.ll

…

ghccc-nest.ll

…

ghccc-rv32.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

ghccc-rv64.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

ghccc-without-f-reg.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

global-merge-offset.ll

…

global-merge.ll

…

graalcc.ll

[IR] Add GraalVM calling conventions

2023-11-17 16:30:09 +00:00

half-arith-strict.ll

…

half-arith.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

half-bitmanip-dagcombines.ll

[clang][RISCV] Change default abi with f extension but without d extension (#73489)

2023-12-15 11:16:05 +08:00

half-br-fcmp.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

half-convert-strict.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

half-convert.ll

[RISCV] Add integer RISCVISD::SELECT_CC to canCreateUndefOrPoison and isGuaranteedNotToBeUndefOrPoison. (#84693)

2024-03-25 11:10:58 -07:00

half-fcmp-strict.ll

…

half-fcmp.ll

[clang][RISCV] Change default abi with f extension but without d extension (#73489)

2023-12-15 11:16:05 +08:00

half-frem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

half-imm.ll

…

half-intrinsics.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

half-isnan.ll

…

half-maximum-minimum.ll

…

half-mem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

half-round-conv-sat.ll

[RISCV] Add integer RISCVISD::SELECT_CC to canCreateUndefOrPoison and isGuaranteedNotToBeUndefOrPoison. (#84693)

2024-03-25 11:10:58 -07:00

half-round-conv.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

half-select-fcmp.ll

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"

2023-10-09 12:31:32 +01:00

half-select-icmp.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

half-zfa-fli.ll

[RISCV] Use FLI + FNEG to materialize some negative FP constants (#70825)

2023-10-31 17:52:50 -07:00

half-zfa.ll

[RISCV] Mark the Zfa extension as non-experimental (#68113)

2023-10-03 18:16:13 +01:00

hoist-global-addr-base.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

hwasan-check-memaccess.ll

…

i32-icmp.ll

…

i64-icmp.ll

…

iabs.ll

[RISCV] Insert a freeze before converting select to AND/OR. (#84232)

2024-03-07 15:03:51 -08:00

idiv_large.ll

…

imm-cse.ll

…

imm.ll

[RISCV] Remove old FIXMEs from test. NFC

2023-11-29 21:53:32 -08:00

indirectbr.ll

…

init-array.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

inline-asm-abi-names.ll

[RISCV] Remove gp and tp from callee saved register lists. (#76483)

2023-12-27 21:36:03 -08:00

inline-asm-clobbers.ll

…

inline-asm-d-abi-names.ll

…

inline-asm-d-constraint-f.ll

[RISCV] Use BuildPairF64 and SplitF64 for bitcast i64<->f64 on rv32 regardless of Zfa. (#85982)

2024-03-21 08:52:51 -07:00

inline-asm-f-abi-names.ll

…

inline-asm-f-constraint-f.ll

…

inline-asm-i-constraint-i1.ll

…

inline-asm-invalid.ll

…

inline-asm-mem-constraint.ll

[RISCV] Teach RISCVMergeBaseOffset to handle inline asm (#78945)

2024-01-22 17:36:32 +08:00

inline-asm-s-constraint-error.ll

[RISCV] Support constraint "s" (#80201)

2024-02-01 10:18:42 -08:00

inline-asm-s-constraint.ll

[RISCV] Support constraint "s" (#80201)

2024-02-01 10:18:42 -08:00

inline-asm-zfh-constraint-f.ll

…

inline-asm.ll

[RISCV][NFC] Move tests of inline asm memory constraints to separate file

2023-08-21 18:59:52 +08:00

inline-option-directive.ll

…

interrupt-attr-args-error.ll

…

interrupt-attr-callee.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

interrupt-attr-invalid.ll

…

interrupt-attr-nocall.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

interrupt-attr-ret-error.ll

…

interrupt-attr.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

intrinsic-cttz-elts-vscale.ll

[DAGCombiner][RISCV] Handle truncating splats in isNeutralConstant (#87338)

2024-04-04 12:36:15 +08:00

intrinsic-cttz-elts.ll

[AArch64] Add intrinsic to count trailing zero elements

2023-10-31 10:48:08 +00:00

isel-optnone.ll

…

jumptable.ll

[RISCV] Add MinimumJumpTableEntries to TuneInfo (#72963)

2023-11-23 14:05:23 +08:00

kcfi-isel-mir.ll

…

kcfi-mir.ll

…

kcfi-patchable-function-prefix.ll

…

kcfi.ll

…

lack-of-signed-truncation-check.ll

[RISCV] Enable the TypePromotion pass from AArch64/ARM.

2024-02-13 09:57:48 -08:00

large-stack.ll

…

legalize-fneg.ll

…

libcall-tail-calls.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

lit.local.cfg

…

live-sp.mir

[MachineFrameInfo] Refactoring around computeMaxcallFrameSize() (NFC) (#78001)

2024-03-18 10:37:59 -04:00

llvm.exp10.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

llvm.frexp.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

load-setcc-combine.ll

[DAGCombiner] Allow tryToFoldExtOfLoad to use a sextload for zext nneg. (#81714)

2024-02-17 11:37:13 -08:00

local-stack-slot-allocation.ll

[RISCV] Add a pass to rewrite rd to x0 for non-computational instrs whose return values are unused

2023-09-20 01:02:19 +08:00

loop-strength-reduce-add-cheaper-than-mul.ll

…

loop-strength-reduce-loop-invar.ll

…

lsr-legaladdimm.ll

…

machine-combiner-mir.ll

…

machine-combiner-strategies.ll

…

machine-combiner.ll

[RISCV] Model integer min max instructions from Zbb execute in late-B ALU

2024-03-14 06:02:53 -07:00

machine-combiner.mir

…

machine-cp.mir

Revert "[MCP] Enhance MCP copy Instruction removal for special case (#70778)"

2023-11-27 19:39:40 +01:00

machine-cse.ll

…

machine-outliner-and-machine-copy-propagation.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

machine-outliner-cfi.mir

[test] -march -> -mtriple (#67741)

2023-09-29 10:43:23 -07:00

machine-outliner-patchable.ll

…

machine-outliner-position.mir

[test] -march -> -mtriple (#67741)

2023-09-29 10:43:23 -07:00

machine-outliner-throw.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

machinelicm-address-pseudos.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

machineoutliner-jumptable.mir

[test] -march -> -mtriple (#67741)

2023-09-29 10:43:23 -07:00

machineoutliner-pcrel-lo.mir

[test] -march -> -mtriple (#67741)

2023-09-29 10:43:23 -07:00

machineoutliner.mir

[test] -march -> -mtriple (#67741)

2023-09-29 10:43:23 -07:00

MachineSink-implicit-x0.mir

…

macro-fusion-lui-addi.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

macro-fusions.mir

[RISCV] Fix macro-fusions.mir

2023-12-22 14:49:59 +08:00

make-compressible-for-store-address.mir

…

make-compressible-rv64.mir

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

make-compressible-zbc.mir

[RISCV] Teach RISCVMakeCompressible handle byte/half load/store for Zcb. (#83375)

2024-03-27 13:40:38 +08:00

make-compressible.mir

[RISCV] Teach RISCVMakeCompressible handle Zca/Zcf/Zce/Zcd. (#81844)

2024-02-22 15:51:19 +08:00

mem64.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

mem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

memcpy-inline.ll

[RISCV] Collapse fast unaligned access into a single feature [nfc-ish] (#73971)

2023-12-01 11:00:59 -08:00

memcpy.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

memset-inline.ll

[RISCV] Collapse fast unaligned access into a single feature [nfc-ish] (#73971)

2023-12-01 11:00:59 -08:00

min-max.ll

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"

2023-10-09 12:31:32 +01:00

mir-target-flags.ll

[RISCV] Merge machine operand flag MO_PLT into MO_CALL (#77253)

2024-01-07 12:43:39 -08:00

misched-load-clustering.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

misched-postra-direction.mir

[CodeGen][MISched] Add misched post-regalloc bidirectional scheduling (#77138)

2024-03-25 10:10:35 -04:00

miss-sp-restore-eh.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

module-elf-flags.ll

[RISCV] Use 'riscv-isa' module flag to set ELF flags and attributes. (#85155)

2024-03-20 11:35:19 -07:00

module-target-abi2.ll

…

module-target-abi3.ll

…

module-target-abi.ll

…

mul.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

musttail-call.ll

…

narrow-shl-cst.ll

…

neg-abs.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

nest-register.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

nomerge.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

nontemporal-scalable.ll

[RISCV] Remove experimental for zihintntl

2023-08-10 17:04:49 +08:00

nontemporal.ll

[RISCV] Remove experimental for zihintntl

2023-08-10 17:04:49 +08:00

O0-pipeline.ll

[CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture. (#77770)

2024-02-26 12:12:31 +00:00

O3-pipeline.ll

[CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture. (#77770)

2024-02-26 12:12:31 +00:00

opt-w-instrs.mir

[RISCV] Rework isSignExtendingOpW to store Register in the worklist.

2024-02-03 23:40:09 -08:00

option-nopic.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

option-norelax.ll

…

option-norvc.ll

…

option-pic.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

option-relax-relocation.ll

[RISCV] Force relocations if initial MCSubtargetInfo contains FeatureRelax (#77436)

2024-01-09 11:24:21 -08:00

option-relax.ll

…

option-rvc.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

optnone-store-no-combine.ll

…

or-is-add.ll

[RISCV] Use disjoint flag in or_is_add.

2024-01-30 22:12:28 -08:00

out-of-reach-emergency-slot.mir

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

overflow-intrinsic-optimizations.ll

…

overflow-intrinsics.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

patchable-function-entry.ll

[MC] Parse SHF_LINK_ORDER argument before section group name (#77407)

2024-01-09 10:42:34 -08:00

pei-crash.ll

[RISCV] Fix crash in PEI with empty entry block with Zcmp (#72117)

2023-11-17 16:18:44 +01:00

pic-models.ll

…

pr40333.ll

…

pr51206.ll

[CGP] Permit tail call optimization on undefined return value

2024-02-22 10:09:15 +01:00

pr53662.mir

…

pr55201.ll

…

pr56110.ll

[RISCV] Collapse fast unaligned access into a single feature [nfc-ish] (#73971)

2023-12-01 11:00:59 -08:00

pr56457.ll

…

pr58025.ll

…

pr58286.ll

…

pr58511.ll

…

pr63365.ll

…

pr63816.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

pr64503.ll

[DAG] FoldSetCC - add missing icmp(X,undef) -> isTrueWhenEqual case (REAPPLIED)

2023-09-13 12:33:39 +01:00

pr64645.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

pr64772.ll

[DAGCombiner][RISCV] Return SDValue(N, 0) instead of SDValue() after 2 calls to CombineTo in visitSTORE.

2023-08-17 15:13:36 -07:00

pr64935.ll

[SDAG][RISCV] Avoid folding setcc (xor C1, -1), C2, cond into setcc (xor C2, -1), C1, cond

2023-08-24 04:18:17 +08:00

pr65025.ll

[RISCV] Prevent tryToFoldBNEOnCmpXchgResult from deleting AND if it has others users.

2023-08-28 10:11:12 -07:00

pr66603.ll

[DAG] canCreateUndefOrPoison - remove AssertSext/AssertZext assumption that they never create undef/poison

2023-10-19 13:28:53 +01:00

pr68855.ll

[RISCV][SDAG] Fix constant narrowing when narrowing loads (#69015)

2023-10-14 06:38:17 +08:00

pr69586.ll

[RISCV] Move V0 to the end of register allocation order (#82967)

2024-03-01 12:17:56 +08:00

pr80052.mir

[StackSlotColoring] Ignore non-spill objects in RemoveDeadStores. (#80242)

2024-02-01 13:25:15 -08:00

pr84200.ll

[RISCV] Insert a freeze before converting select to AND/OR. (#84232)

2024-03-07 15:03:51 -08:00

prefetch.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

push-pop-opt-crash.ll

[RISCV] Fix typo in ABI name in test. NFC

2024-02-09 11:46:23 -08:00

push-pop-popret.ll

[RISCV] Add test for saving s10 with cm.push. NFC

2024-02-08 21:03:41 -08:00

readcyclecounter.ll

…

readsteadycounter.ll

[RISCV] Support llvm.readsteadycounter intrinsic

2024-02-21 13:12:14 +08:00

reduce-unnecessary-extension.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

reduction-formation.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

regalloc-last-chance-recoloring-failure.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

relax-per-target-feature.ll

[RISCV] Update relax-per-target-feature.ll to use hexadecimal constants. NFC

2023-12-14 21:08:01 -08:00

rem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

remat.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

repeated-fp-divisors.ll

…

reserved-reg-errors.ll

…

reserved-regs.ll

…

riscv-codegenprepare-asm.ll

Revert "[LSR][TTI][RISCV] Disable terminator folding for RISC-V."

2024-01-11 13:20:02 -08:00

riscv-codegenprepare.ll

[RISCV] Don't look for sext in RISCVCodeGenPrepare::visitAnd.

2024-01-19 14:44:47 -08:00

riscv-func-target-feature.ll

[RISCV] Collapse fast unaligned access into a single feature [nfc-ish] (#73971)

2023-12-01 11:00:59 -08:00

riscv-shifted-extend.ll

[Test] Pre-submit tests for #68972 (#69040)

2023-10-14 12:18:43 +08:00

rotl-rotr.ll

…

rv32-fuchsia.ll

…

rv32e.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

rv32i-rv64i-float-double.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv32i-rv64i-half.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv32xtheadba.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

rv32xtheadbb.ll

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

rv32xtheadbs.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

rv32zba.ll

…

rv32zbb-intrinsic.ll

…

rv32zbb-zbkb.ll

[RISCV] Insert a freeze before converting select to AND/OR. (#84232)

2024-03-07 15:03:51 -08:00

rv32zbb.ll

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

rv32zbc-intrinsic.ll

…

rv32zbc-zbkc-intrinsic.ll

…

rv32zbkb-intrinsic.ll

…

rv32zbkb.ll

[RISCV] Add more packh patterns.

2023-11-11 19:31:23 -08:00

rv32zbkx-intrinsic.ll

…

rv32zbs.ll

[RISCV] Insert a freeze before converting select to AND/OR. (#84232)

2024-03-07 15:03:51 -08:00

rv32zimop-intrinsic.ll

[RISCV][ISel] Add ISel support for experimental Zimop extension (#77089)

2024-01-29 15:24:00 -08:00

rv32zknd-intrinsic-autoupgrade.ll

…

rv32zknd-intrinsic.ll

…

rv32zkne-intrinsic-autoupgrade.ll

…

rv32zkne-intrinsic.ll

…

rv32zknh-intrinsic.ll

…

rv32zksed-intrinsic-autoupgrade.ll

…

rv32zksed-intrinsic.ll

…

rv32zksh-intrinsic.ll

…

rv64-large-stack.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv64-patchpoint.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

rv64-stackmap-frame-setup.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

rv64-stackmap-nops.ll

[RISCV] Add Stackmap/Statepoint/Patchpoint support without targets

2023-10-11 09:18:55 +05:30

rv64-stackmap.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

rv64-typepromotion.ll

[RISCV][TypePromotion] Dont generate truncs if PromotedType is greater than Source Type (#86941)

2024-03-28 21:22:05 -07:00

rv64d-double-convert-strict.ll

…

rv64d-double-convert.ll

…

rv64e.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

rv64f-float-convert-strict.ll

…

rv64f-float-convert.ll

…

rv64i-complex-float.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv64i-demanded-bits.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

rv64i-double-softfloat.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv64i-exhaustive-w-insts.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

rv64i-shift-sext.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

rv64i-single-softfloat.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv64i-tricky-shifts.ll

…

rv64i-w-insts-legalization.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

rv64m-exhaustive-w-insts.ll

…

rv64m-w-insts-legalization.ll

…

rv64xtheadba.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

rv64xtheadbb.ll

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

rv64xtheadbs.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

rv64zba.ll

[RISCV] Add tests for opportunities to reassociate to form more shXadd instructions. NFC

2024-04-05 12:50:48 -07:00

rv64zbb-intrinsic.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

rv64zbb-zbkb.ll

…

rv64zbb.ll

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

rv64zbc-intrinsic.ll

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rv64zbc-zbkc-intrinsic.ll

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rv64zbkb-intrinsic.ll

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rv64zbkb.ll

[RISCV] Add more packh patterns.

2023-11-11 19:31:23 -08:00

rv64zbkx-intrinsic.ll

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rv64zbs.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv64zfh-half-convert-strict.ll

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rv64zfh-half-convert.ll

…

rv64zfh-half-intrinsics.ll

…

rv64zfhmin-half-convert-strict.ll

…

rv64zfhmin-half-convert.ll

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rv64zfhmin-half-intrinsics.ll

…

rv64zimop-intrinsic.ll

[RISCV][ISel] Add ISel support for experimental Zimop extension (#77089)

2024-01-29 15:24:00 -08:00

rv64zknd-intrinsic.ll

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rv64zknd-zkne-intrinsic.ll

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rv64zkne-intrinsic.ll

…

rv64zknh-intrinsic-autoupgrade.ll

…

rv64zknh-intrinsic.ll

…

rv64zksed-intrinsic-autoupgrade2.ll

…

rv64zksed-intrinsic-autoupgrade.ll

…

rv64zksed-intrinsic.ll

…

rv64zksh-intrinsic-autoupgrade.ll

…

rv64zksh-intrinsic.ll

…

sadd_sat_plus.ll

[RISCV] Custom type legalize i32 SADDSAT/SSUBSAT without Zbb.

2024-02-04 23:15:58 -08:00

sadd_sat.ll

[RISCV] Custom type legalize i32 SADDSAT/SSUBSAT without Zbb.

2024-02-04 23:15:58 -08:00

saverestore-scs.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

saverestore.ll

…

sdata-limit-0.ll

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sdata-limit-4.ll

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sdata-limit-8.ll

…

sdata-local-sym.ll

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sdiv-pow2-cmov.ll

[RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (#67364)

2023-11-10 21:38:47 +08:00

select-and.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

select-bare.ll

…

select-binop-identity.ll

[RISCV] Graduate Zicond to non-experimental (#79811)

2024-01-29 15:58:54 +00:00

select-cc.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

select-const.ll

…

select-constant-xor.ll

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select-optimize-multiple.ll

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select-optimize-multiple.mir

…

select-or.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

select-to-and-zext.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

select.ll

[RISCV][SDAG] Improve codegen of select with constants if zicond is available (#82456)

2024-02-23 00:18:56 +08:00

selectcc-to-shiftand.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

setcc-logic.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

sext-zext-trunc.ll

[DAGCombiner][RISCV] CSE zext nneg and sext. (#82597)

2024-02-22 09:06:49 -08:00

sextw-removal-debug.mir

[RISCV] Ignore debug instructions in hasAllNBitUsers in RISCVOptWInstrs.

2023-12-03 21:27:50 -08:00

sextw-removal.ll

[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501)

2024-01-16 13:36:24 +07:00

shadowcallstack.ll

[RISCV] Add Zicfiss support to the shadow call stack implementation. (#68075)

2024-02-10 22:18:46 +08:00

shift-amount-mod.ll

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shift-and.ll

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shift-masked-shamt.ll

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shifts.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

shl-demanded.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

shlimm-addimm.ll

[RISCV] Strip W suffix from ADDIW (#68425)

2023-10-06 10:28:01 -07:00

short-forward-branch-opt.ll

[RISCV] Enable PostRAScheduler for SiFive7 (#83166)

2024-02-29 09:57:15 -05:00

shrinkwrap-jump-table.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

shrinkwrap.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

sifive7-enable-intervals.mir

[RISCV] Add missing REQUIRES asserts to test (NFC)

2023-12-20 09:42:14 +01:00

signbit-test.ll

[RISCV] Enable the TypePromotion pass from AArch64/ARM.

2024-02-13 09:57:48 -08:00

signed-truncation-check.ll

[SelectionDAG] Allow FREEZE to be hoisted before integer SETCC. (#84241)

2024-03-08 10:17:54 -08:00

sink-icmp.ll

…

spill-fill-fold.ll

[RISCV] Use BuildPairF64 and SplitF64 for bitcast i64<->f64 on rv32 regardless of Zfa. (#85982)

2024-03-21 08:52:51 -07:00

spill-fpr-scalar.ll

[RISCVInsertVSETVLI] Default to VL=1 for scalar extracts

2023-08-16 07:35:00 -07:00

spir-kernel-cc.ll

[OpenCL][RISCV] Support SPIR_KERNEL calling convention (#69282)

2023-10-19 11:00:39 +08:00

split-offsets.ll

[RISCV] Enable -riscv-enable-sink-fold by default. (#82026)

2024-02-22 09:07:21 -08:00

split-sp-adjust.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

split-store.ll

…

split-udiv-by-constant.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

split-urem-by-constant.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

srem-lkk.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

srem-seteq-illegal-types.ll

[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501)

2024-01-16 13:36:24 +07:00

srem-vector-lkk.ll

[RISCV] Enable -riscv-enable-sink-fold by default. (#82026)

2024-02-22 09:07:21 -08:00

srodata.ll

[RISCV] Place mergeable small read only data into srodata section (#82214)

2024-03-11 13:57:06 +08:00

ssub_sat_plus.ll

[RISCV] Custom type legalize i32 SADDSAT/SSUBSAT without Zbb.

2024-02-04 23:15:58 -08:00

ssub_sat.ll

[RISCV] Custom type legalize i32 SADDSAT/SSUBSAT without Zbb.

2024-02-04 23:15:58 -08:00

stack-folding.ll

[RISCV] Remove gp and tp from callee saved register lists. (#76483)

2023-12-27 21:36:03 -08:00

stack-inst-compress.mir

[MachineFrameInfo] Refactoring around computeMaxcallFrameSize() (NFC) (#78001)

2024-03-18 10:37:59 -04:00

stack-protector-target.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

stack-realignment-with-variable-sized-objects.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

stack-realignment.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

stack-slot-coloring.mir

[test] -march -> -mtriple (#67741)

2023-09-29 10:43:23 -07:00

stack-slot-size.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

stack-store-check.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

strip-w-suffix.ll

[RISCV] Add a tune feature to disable stripping W suffix (#86255)

2024-03-25 11:44:16 +08:00

subtarget-features-std-ext.ll

…

switch-width.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

tagged-globals.ll

…

tail-calls.ll

[RISCV][NFC] Simplify calls.ll and autogenerate checks for tail-calls.ll

2024-02-01 20:50:20 +08:00

target-abi-invalid.ll

…

target-abi-valid.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

thread-pointer.ll

…

tls-models.ll

[RISCV] Support TLSDESC in the RISC-V backend (#66915)

2024-01-23 16:16:07 -08:00

tlsdesc-symbol.ll

[llvm][lld] Pre-commit tests for RISCV TLSDESC symbols

2024-03-20 13:39:39 -07:00

trunc-free.ll

…

typepromotion-overflow.ll

Recommit "[TypePromotion] Support positive addition amounts in isSafeWrap. (#81690)"

2024-03-11 12:39:38 -07:00

uadd_sat_plus.ll

…

uadd_sat.ll

…

umulo-128-legalisation-lowering.ll

[MachineCombiner] Don't ignore PHI depths (#82025)

2024-03-14 11:47:29 -04:00

unaligned-load-store.ll

[RISCV] Collapse fast unaligned access into a single feature [nfc-ish] (#73971)

2023-12-01 11:00:59 -08:00

unfold-masked-merge-scalar-variablemask.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

unroll-loop-cse.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

urem-lkk.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

urem-seteq-illegal-types.ll

[RISCV] Consider truncate semantics in performBUILD_VECTORCombine (#81168)

2024-02-08 11:28:06 -08:00

urem-vector-lkk.ll

[RISCV] Enable -riscv-enable-sink-fold by default. (#82026)

2024-02-22 09:07:21 -08:00

usub_sat_plus.ll

…

usub_sat.ll

…

vararg-ilp32e.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vararg.ll

[RISCV] Lower the TransientStackAlignment to the ABI alignment for rv32e/rv64e.

2024-02-09 21:48:11 -08:00

vector-abi.ll

[RISCV] Merge machine operand flag MO_PLT into MO_CALL (#77253)

2024-01-07 12:43:39 -08:00

verify-instr.mir

[test] -march -> -mtriple (#67741)

2023-09-29 10:43:23 -07:00

vlenb.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

vscale-demanded-bits.ll

…

wide-mem.ll

…

wide-scalar-shift-by-byte-multiple-legalization.ll

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"

2023-10-09 12:31:32 +01:00

wide-scalar-shift-legalization.ll

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"

2023-10-09 12:31:32 +01:00

xaluo.ll

[RISCV] Graduate Zicond to non-experimental (#79811)

2024-01-29 15:58:54 +00:00

xcvbitmanip.ll

[RISCV] Implement intrinsics for XCVbitmanip extension in CV32E40P (#74993)

2023-12-17 19:29:40 +08:00

xtheadfmemidx.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

xtheadmac.ll

…

xtheadmemidx.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

xtheadmempair.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

zbb-cmp-combine.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

zcb-regalloc-hints.ll

[RISCV] Add regalloc hints for Zcb instructions. (#78949)

2024-01-23 09:33:06 -08:00

zcmp-additional-stack.ll

[RISCV] Align stack size down to a multiple of 16 before using cm.push/pop. (#86073)

2024-03-26 21:37:19 -07:00

zcmp-cm-popretz.mir

[RISCV] Add correct Uses, Defs, isReturn to Zcmp (#81039)

2024-02-07 14:30:45 -08:00

zcmp-cm-push-pop.mir

[RISCV] Add correct Uses, Defs, isReturn to Zcmp (#81039)

2024-02-07 14:30:45 -08:00

zcmp-prolog-epilog-crash.mir

[RISCV] Fix assertion failure when zcmp extension is enabled.

2023-08-29 22:06:30 -07:00

zcmp-with-float.ll

[RISCV] Remove stale comment from test. NFC (#81098)

2024-02-12 09:19:28 -08:00

zdinx-asm-constraint.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

zdinx-boundary-check.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

zdinx-large-spill.mir

[RISCV] Preserve MMO when expanding PseudoRV32ZdinxSD/PseudoRV32ZdinxLD. (#85877)

2024-03-26 20:42:14 -07:00

zext-with-load-is-free.ll

[RISCV] Remove setJumpIsExpensive(). (#74647)

2023-12-13 09:37:25 -08:00

zfbfmin.ll

…

zfh-half-intrinsics-strict.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

zfh-half-intrinsics.ll

…

zfhmin-half-intrinsics-strict.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

zfhmin-half-intrinsics.ll

…

zfhmin-imm.ll

…

zmmul.ll

…