1b10438875
Summary:
This patch keeps track of MCSymbols created for blocks that were
referenced in inline asm. It prevents creating a new symbol which
doesn't refer to the block.
Inline asm may have a reference to a label. The asm parser however
doesn't recognize it as a label and tries to create a new symbol. The
result being that instead of the original symbol (e.g. ".Ltmp0") the
parser replaces it in the inline asm with the new one (e.g. ".Ltmp00")
without updating it in the symbol table. So the machine basic block
retains the "old" symbol (".Ltmp0"), but the inline asm uses the new one
(".Ltmp00").
Reviewers: nickdesaulniers, craig.topper
Subscribers: nathanchance, javed.absar, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65304
llvm-svn: 368477
134 lines
4.8 KiB
LLVM
134 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-- -O3 | FileCheck %s
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; Tests for using callbr as an asm-goto wrapper
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; Test 1 - fallthrough label gets removed, but the fallthrough code that is
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; unreachable due to asm ending on a jmp is still left in.
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define i32 @test1(i32 %a) {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: addl $4, %eax
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; CHECK-NEXT: #APP
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: jmp .Ltmp0
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: .LBB0_1: # %normal
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: retl
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; CHECK-NEXT: .Ltmp0: # Block address taken
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; CHECK-NEXT: .LBB0_2: # %fail
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: retl
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entry:
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%0 = add i32 %a, 4
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callbr void asm "xorl $0, $0; jmp ${1:l}", "r,X,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test1, %fail)) to label %normal [label %fail]
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normal:
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ret i32 0
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fail:
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ret i32 1
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}
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; Test 2 - callbr terminates an unreachable block, function gets simplified
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; to a trivial zero return.
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define i32 @test2(i32 %a) {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: retl
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entry:
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br label %normal
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unreachableasm:
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%0 = add i32 %a, 4
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callbr void asm sideeffect "xorl $0, $0; jmp ${1:l}", "r,X,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test2, %fail)) to label %normal [label %fail]
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normal:
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ret i32 0
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fail:
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ret i32 1
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}
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; Test 3 - asm-goto implements a loop. The loop gets recognized, but many loop
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; transforms fail due to canonicalization having callbr exceptions. Trivial
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; blocks at labels 1 and 3 also don't get simplified due to callbr.
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define dso_local i32 @test3(i32 %a) {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: .Ltmp1: # Block address taken
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; CHECK-NEXT: .LBB2_1: # %label01
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; CHECK-NEXT: # =>This Loop Header: Depth=1
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; CHECK-NEXT: # Child Loop BB2_2 Depth 2
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; CHECK-NEXT: # Child Loop BB2_3 Depth 3
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; CHECK-NEXT: # Child Loop BB2_4 Depth 4
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; CHECK-NEXT: .Ltmp2: # Block address taken
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; CHECK-NEXT: .LBB2_2: # %label02
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; CHECK-NEXT: # Parent Loop BB2_1 Depth=1
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; CHECK-NEXT: # => This Loop Header: Depth=2
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; CHECK-NEXT: # Child Loop BB2_3 Depth 3
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; CHECK-NEXT: # Child Loop BB2_4 Depth 4
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; CHECK-NEXT: addl $4, {{[0-9]+}}(%esp)
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; CHECK-NEXT: .Ltmp3: # Block address taken
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; CHECK-NEXT: .LBB2_3: # %label03
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; CHECK-NEXT: # Parent Loop BB2_1 Depth=1
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; CHECK-NEXT: # Parent Loop BB2_2 Depth=2
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; CHECK-NEXT: # => This Loop Header: Depth=3
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; CHECK-NEXT: # Child Loop BB2_4 Depth 4
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: .Ltmp4: # Block address taken
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; CHECK-NEXT: .LBB2_4: # %label04
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; CHECK-NEXT: # Parent Loop BB2_1 Depth=1
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; CHECK-NEXT: # Parent Loop BB2_2 Depth=2
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; CHECK-NEXT: # Parent Loop BB2_3 Depth=3
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; CHECK-NEXT: # => This Inner Loop Header: Depth=4
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; CHECK-NEXT: #APP
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; CHECK-NEXT: jmp .Ltmp1
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; CHECK-NEXT: jmp .Ltmp2
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; CHECK-NEXT: jmp .Ltmp3
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: .LBB2_5: # %normal0
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; CHECK-NEXT: # in Loop: Header=BB2_4 Depth=4
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; CHECK-NEXT: #APP
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; CHECK-NEXT: jmp .Ltmp1
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; CHECK-NEXT: jmp .Ltmp2
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; CHECK-NEXT: jmp .Ltmp3
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; CHECK-NEXT: jmp .Ltmp4
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: .LBB2_6: # %normal1
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: retl
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entry:
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%a.addr = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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br label %label01
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label01: ; preds = %normal0, %label04, %entry
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br label %label02
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label02: ; preds = %normal0, %label04, %label01
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%0 = load i32, i32* %a.addr, align 4
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%add = add nsw i32 %0, 4
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store i32 %add, i32* %a.addr, align 4
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br label %label03
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label03: ; preds = %normal0, %label04, %label02
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br label %label04
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label04: ; preds = %normal0, %label03
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callbr void asm sideeffect "jmp ${0:l}; jmp ${1:l}; jmp ${2:l}", "X,X,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test3, %label01), i8* blockaddress(@test3, %label02), i8* blockaddress(@test3, %label03))
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to label %normal0 [label %label01, label %label02, label %label03]
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normal0: ; preds = %label04
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callbr void asm sideeffect "jmp ${0:l}; jmp ${1:l}; jmp ${2:l}; jmp ${3:l}", "X,X,X,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test3, %label01), i8* blockaddress(@test3, %label02), i8* blockaddress(@test3, %label03), i8* blockaddress(@test3, %label04))
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to label %normal1 [label %label01, label %label02, label %label03, label %label04]
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normal1: ; preds = %normal0
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%1 = load i32, i32* %a.addr, align 4
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ret i32 %1
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}
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