8b1eeafb91
Initially SLP vectorizer replaced all going-to-be-vectorized instructions with Undef values. It may break ScalarEvaluation and may cause a crash. Reworked SLP vectorizer so that it does not replace vectorized instructions by UndefValue anymore. Instead vectorized instructions are marked for deletion inside if BoUpSLP class and deleted upon class destruction. Reviewers: mzolotukhin, mkuper, hfinkel, RKSimon, davide, spatel Subscribers: RKSimon, Gerolf, anemet, hans, majnemer, llvm-commits, sanjoy Differential Revision: https://reviews.llvm.org/D29641 llvm-svn: 373166
68 lines
2.9 KiB
LLVM
68 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -slp-vectorizer -slp-vectorize-hor -slp-vectorize-hor-store -S < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
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define void @mainTest(i32* %ptr) #0 {
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; CHECK-LABEL: @mainTest(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[PTR:%.*]], null
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; CHECK-NEXT: br i1 [[CMP]], label [[LOOP:%.*]], label [[BAIL_OUT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[DUMMY_PHI:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[OP_EXTRA5:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[PTR]], i64 1
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; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[PTR]], i64 2
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[PTR]], i64 3
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[PTR]] to <4 x i32>*
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; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[TMP4]], i32 3
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; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP4]], i32 2
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; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i32> [[TMP4]], i32 1
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; CHECK-NEXT: [[TMP8:%.*]] = mul <4 x i32> [[TMP4]], [[TMP4]]
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; CHECK-NEXT: [[TMP9:%.*]] = sext i32 [[TMP6]] to i64
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; CHECK-NEXT: [[RDX_SHUF:%.*]] = shufflevector <4 x i32> [[TMP8]], <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
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; CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[TMP8]], [[RDX_SHUF]]
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; CHECK-NEXT: [[RDX_SHUF1:%.*]] = shufflevector <4 x i32> [[BIN_RDX]], <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[BIN_RDX2:%.*]] = add <4 x i32> [[BIN_RDX]], [[RDX_SHUF1]]
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; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i32> [[BIN_RDX2]], i32 0
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; CHECK-NEXT: [[OP_EXTRA:%.*]] = add i32 [[TMP10]], 1
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; CHECK-NEXT: [[OP_EXTRA3:%.*]] = add i32 [[OP_EXTRA]], [[TMP7]]
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; CHECK-NEXT: [[OP_EXTRA4:%.*]] = add i32 [[OP_EXTRA3]], [[TMP6]]
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; CHECK-NEXT: [[OP_EXTRA5]] = add i32 [[OP_EXTRA4]], [[TMP5]]
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; CHECK-NEXT: br label [[LOOP]]
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; CHECK: bail_out:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp = icmp eq i32* %ptr, null
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br i1 %cmp, label %loop, label %bail_out
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loop:
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%dummy_phi = phi i32 [ 1, %entry ], [ %18, %loop ]
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%0 = load i32, i32 * %ptr , align 4
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%1 = mul i32 %0, %0
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%2 = add i32 1, %1
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%3 = getelementptr inbounds i32, i32 * %ptr, i64 1
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%4 = load i32, i32 * %3 , align 4
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%5 = mul i32 %4, %4
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%6 = add i32 %2, %4
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%7 = add i32 %6, %5
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%8 = getelementptr inbounds i32, i32 *%ptr, i64 2
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%9 = load i32, i32 * %8 , align 4
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%10 = mul i32 %9, %9
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%11 = add i32 %7, %9
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%12 = add i32 %11, %10
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%13 = sext i32 %9 to i64
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%14 = getelementptr inbounds i32, i32 *%ptr, i64 3
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%15 = load i32, i32 * %14 , align 4
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%16 = mul i32 %15, %15
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%17 = add i32 %12, %15
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%18 = add i32 %17, %16
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br label %loop
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bail_out:
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ret void
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}
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attributes #0 = { "target-cpu"="westmere" }
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