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Roman Lebedev 38c25ace53 [NFC][x86][AArch64] Add BEXTR-like test patterns. 
Summary: Also, adjust the check prefixes so that we actually get to check the BMI1-only-case.

Reviewers: craig.topper, RKSimon, spatel, javed.absar

Reviewed By: RKSimon

Subscribers: kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D48490

llvm-svn: 342623
2018-09-20 07:54:49 +00:00
..
GlobalISel
[GlobalISel] Lower dbg.declare into indirect DBG_VALUE
2018-09-11 17:52:01 +00:00
128bit_load_store.ll
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a57-csel.ll
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aarch64_f16_be.ll
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aarch64_tree_tests.ll
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aarch64_win64cc_vararg.ll
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aarch64-2014-08-11-MachineCombinerCrash.ll
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aarch64-2014-12-02-combine-soften.ll
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aarch64-a57-fp-load-balancing.ll
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aarch64-address-type-promotion-assertion.ll
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aarch64-address-type-promotion.ll
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aarch64-addv.ll
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aarch64-be-bv.ll
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aarch64-codegen-prepare-atp.ll
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aarch64-combine-fmul-fsub.mir
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aarch64-DAGCombine-findBetterNeighborChains-crash.ll
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aarch64-dynamic-stack-layout.ll
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aarch64-fix-cortex-a53-835769.ll
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aarch64-fold-lslfast.ll
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aarch64-gep-opt.ll
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aarch64-minmaxv.ll
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aarch64-neon-v1i1-setcc.ll
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aarch64-smax-constantfold.ll
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aarch64-smull.ll
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aarch64-tbz.ll
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aarch64-tryBitfieldInsertOpFromOr-crash.ll
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aarch64-vcvtfp2fxs-combine.ll
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aarch64-vector-pcs.mir
[AArch64] Implement aarch64_vector_pcs codegen support.
2018-09-12 12:10:22 +00:00
aarch64-vuzp.ll
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aarch64-wide-shuffle.ll
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alloca.ll
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andandshift.ll
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argument-blocks.ll
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arm64-2011-03-09-CPSRSpill.ll
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arm64-2011-03-21-Unaligned-Frame-Index.ll
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arm64-2011-04-21-CPSRBug.ll
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arm64-2011-10-18-LdStOptBug.ll
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arm64-2012-01-11-ComparisonDAGCrash.ll
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arm64-2012-05-07-MemcpyAlignBug.ll
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arm64-2012-05-09-LOADgot-bug.ll
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arm64-2012-05-22-LdStOptBug.ll
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arm64-2012-06-06-FPToUI.ll
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arm64-2012-07-11-InstrEmitterBug.ll
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arm64-inline-asm-error-J.ll
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arm64-inline-asm-error-L.ll
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arm64-inline-asm-error-M.ll
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arm64-inline-asm-error-N.ll
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arm64-inline-asm-zero-reg-error.ll
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arm64-inline-asm.ll
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arm64-join-reserved.ll
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arm64-jumptable.ll
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arm64-ld1.ll
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arm64-ld-from-st.ll
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arm64-ldp-aa.ll
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arm64-ldp-cluster.ll
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arm64-ldp.ll
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arm64-ldst-unscaled-pre-post.mir
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arm64-ldur.ll
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arm64-ldxr-stxr.ll
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arm64-leaf.ll
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arm64-long-shift.ll
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arm64-memcpy-inline.ll
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arm64-memset-inline.ll
ARM64: improve non-zero memset isel by ~2x
2018-09-06 16:03:32 +00:00
arm64-memset-to-bzero.ll
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arm64-misaligned-memcpy-inline.ll
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arm64-misched-basic-A53.ll
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arm64-misched-basic-A57.ll
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arm64-misched-forwarding-A53.ll
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arm64-misched-memdep-bug.ll
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arm64-misched-multimmo.ll
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arm64-movi.ll
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arm64-neon-v8.1a.ll
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arm64-patchpoint-scratch-regs.ll
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arm64-patchpoint-webkit_jscc.ll
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arm64-patchpoint.ll
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arm64-pic-local-symbol.ll
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arm64-platform-reg.ll
[AArch64] Support reserving x1-7 registers.
2018-09-07 20:58:57 +00:00
arm64-popcnt.ll
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arm64-prefetch.ll
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arm64-promote-const.ll
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arm64-redzone.ll
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arm64-reg-copy-noneon.ll
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arm64-register-offset-addressing.ll
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arm64-register-pairing.ll
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arm64-regress-f128csel-flags.ll
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arm64-regress-interphase-shift.ll
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arm64-regress-opt-cmp.mir
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arm64-reserved-arg-reg-call-error.ll
[AArch64] Support reserving x1-7 registers.
2018-09-07 20:58:57 +00:00
arm64-return-vector.ll
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arm64-returnaddr.ll
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arm64-rev.ll
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arm64-shrink-wrapping.ll
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arm64-simd-scalar-to-vector.ll
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arm64-simplest-elf.ll
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arm64-sincos.ll
[TargetLowering] Android has sincos functions
2018-09-18 13:18:21 +00:00
arm64-sitofp-combine-chains.ll
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arm64-sli-sri-opt.ll
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arm64-smaxv.ll
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arm64-tbl.ll
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arm64-this-return.ll
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arm64-tls-darwin.ll
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arm64-tls-dynamic-together.ll
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arm64-tls-dynamics.ll
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
arm64-tls-execs.ll
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
arm64-trap.ll
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arm64-vcvtxd_f32_f64.ll
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arm64-zext.ll
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asm-print-comments.ll
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assertion-rc-mismatch.ll
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atomic-ops-lse.ll
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atomic-ops-not-barriers.ll
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atomic-ops.ll
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basic-pic.ll
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bics.ll
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bitcast-v2i8.ll
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bitcast.ll
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bitfield-extract.ll
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bitfield-insert-0.ll
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bitfield-insert.ll
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bitfield.ll
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bitreverse.ll
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blockaddress.ll
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
bool-loads.ll
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br-cond-not-merge.ll
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breg.ll
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callee-save.ll
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ccmp-successor-probs.mir
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cfi_restore.mir
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cmp-frameindex.ll
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cmpwithshort.ll
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cmpxchg-idioms.ll
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cmpxchg-O0.ll
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code-model-large-abs.ll
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code-model-tiny-abs.ll
[AArch64] Optimise load(adr address) to ldr address
2018-08-30 11:55:16 +00:00
combine-and-like.ll
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combine-comparisons-by-cse.ll
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compare-branch.ll
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compiler-ident.ll
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complex-copy-noneon.ll
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complex-fp-to-int.ll
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complex-int-to-fp.ll
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cond-br-tuning.ll
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cond-sel-value-prop.ll
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cond-sel.ll
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consthoist-gep.ll
Revert "Revert r341269: [Constant Hoisting] Hoisting Constant GEP Expressions"
2018-09-04 22:17:03 +00:00
copyprop.mir
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cpus.ll
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csel-zero-float.ll
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cxx-tlscc.ll
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dag-combine-invaraints.ll
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dag-combine-mul-shl.ll
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dag-combine-select.ll
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dag-numsignbits.ll
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directcond.ll
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div_minsize.ll
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divrem.ll
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dllexport.ll
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dllimport.ll
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dp1.ll
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dp2.ll
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emutls_generic.ll
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emutls.ll
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eon.ll
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expand-select.ll
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extern-weak.ll
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
extract-bits.ll
[NFC][x86][AArch64] Add BEXTR-like test patterns.
2018-09-20 07:54:49 +00:00
extract-lowbits.ll
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extract.ll
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f16-convert.ll
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fabs.ll
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fp128-folding.ll
…
fp-cond-sel.ll
…
fp-dp3.ll
…
fpconv-vector-op-scalarize.ll
…
fpimm.ll
[AArch64] Optimise load(adr address) to ldr address
2018-08-30 11:55:16 +00:00
fptouint-i8-zext.ll
…
frameaddr.ll
…
free-zext.ll
…
ftrunc.ll
…
func-argpassing.ll
…
func-calls.ll
…
funcptr_cast.ll
…
function-subtarget-features.ll
…
funnel-shift-rot.ll
[SelectionDAG] try harder to convert funnel shift to rotate
2018-08-09 17:26:22 +00:00
funnel-shift.ll
…
gep-nullptr.ll
…
ghc-cc.ll
…
global-alignment.ll
…
global-merge-1.ll
…
global-merge-2.ll
…
global-merge-3.ll
[GlobalMerge] Fix GlobalMerge on bss external global variables.
2018-08-30 00:49:50 +00:00
global-merge-4.ll
…
global-merge-group-by-use.ll
…
global-merge-ignore-single-use-minsize.ll
…
global-merge-ignore-single-use.ll
…
global-merge.ll
…
got-abuse.ll
…
half.ll
…
hints.ll
…
i1-contents.ll
…
i128-align.ll
…
i128-fast-isel-fallback.ll
…
iabs.ll
[AArch64] Add integer abs testcases for D51873.
2018-09-13 17:11:25 +00:00
ifcvt-select.ll
…
illegal-float-ops.ll
…
implicit-sret.ll
…
init-array.ll
…
inline-asm-clobber.ll
[CodeGen] emit inline asm clobber list warnings for reserved (cont)
2018-08-30 12:52:35 +00:00
inline-asm-constraints-badI.ll
…
inline-asm-constraints-badK2.ll
…
inline-asm-constraints-badK.ll
…
inline-asm-constraints-badL.ll
…
inline-asm-globaladdress.ll
…
inlineasm-illegal-type.ll
[AArch64] Reject inline asm with FP registers when FP is disabled.
2018-08-24 19:12:13 +00:00
inlineasm-ldr-pseudo.ll
…
inlineasm-S-constraint.ll
…
inlineasm-X-allocation.ll
…
inlineasm-X-constraint.ll
…
intrinsics-memory-barrier.ll
…
jump-table.ll
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
known-never-nan.ll
DAG: Fix isKnownNeverNaN for basic non-sNaN cases
2018-08-17 21:19:22 +00:00
lack-of-signed-truncation-check.ll
[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern
2018-09-02 13:56:22 +00:00
large_shift.ll
…
large-consts.ll
…
ldp-stp-scaled-unscaled-pairs.ll
…
ldradr.ll
[AArch64] Optimise load(adr address) to ldr address
2018-08-30 11:55:16 +00:00
ldst-miflags.mir
…
ldst-opt-aa.mir
…
ldst-opt-zr-clobber.mir
…
ldst-opt.ll
…
ldst-opt.mir
…
ldst-paired-aliasing.ll
…
ldst-regoffset.ll
…
ldst-unscaledimm.ll
…
ldst-unsignedimm.ll
…
ldst-zero.ll
…
legalize-bug-bogus-cpu.ll
…
lit.local.cfg
…
literal_pools_float.ll
[AArch64] Optimise load(adr address) to ldr address
2018-08-30 11:55:16 +00:00
live-interval-analysis.mir
…
load-combine-big-endian.ll
…
load-combine.ll
…
local_vars.ll
…
logical_shifted_reg.ll
…
logical-imm.ll
…
loh.mir
…
loop-micro-op-buffer-size-t99.ll
…
loopvectorize_pr33804_double.ll
…
lower-range-metadata-func-call.ll
…
machine_cse_impdef_killflags.ll
…
machine_cse.ll
…
machine-combiner-madd.ll
…
machine-combiner.ll
…
machine-combiner.mir
…
machine-copy-prop.ll
…
machine-copy-remove.ll
…
machine-copy-remove.mir
…
machine-dead-copy.mir
…
machine-outliner-bad-adrp.mir
…
machine-outliner-bad-register.mir
…
machine-outliner-calls.mir
…
machine-outliner-default.mir
…
machine-outliner-flags.ll
…
machine-outliner-inline-asm-adrp.mir
…
machine-outliner-noredzone.ll
…
machine-outliner-regsave.mir
…
machine-outliner-remarks.ll
…
machine-outliner-size-info.mir
[MachineOutliner] Add codegen size remarks to the MachineOutliner
2018-09-11 23:05:34 +00:00
machine-outliner-tail.ll
…
machine-outliner-thunk.ll
…
machine-outliner.ll
…
machine-outliner.mir
…
machine-scheduler.mir
…
machine-sink-kill-flags.ll
…
machine-sink-zr.mir
…
machine-zero-copy-remove.mir
…
macho-global-symbols.ll
…
macho-trap.ll
…
macro-fusion-last.mir
…
madd-combiner.ll
…
madd-lohi.ll
…
mature-mc-support.ll
…
max-jump-table.ll
…
memcpy-f128.ll
…
merge-store-dependency.ll
…
merge-store.ll
…
mergestores_noimplicitfloat.ll
…
min-jump-table.ll
…
mingw-refptr.ll
[MinGW] [AArch64] Add stubs for potential automatic dllimported variables
2018-09-04 20:56:21 +00:00
minmax-of-minmax.ll
…
minmax.ll
…
misched-fusion-addr.ll
…
misched-fusion-aes.ll
…
misched-fusion-crypto-eor.mir
AArch64: Add FuseCryptoEOR fusion rules
2018-09-19 20:50:51 +00:00
misched-fusion-csel.ll
…
misched-fusion-lit.ll
…
misched-fusion.ll
…
misched-stp.ll
…
mlicm-stack-write-check.mir
…
movimm-wzr.mir
…
movw-consts.ll
…
movw-shift-encoding.ll
…
mul_pow2.ll
…
mul-lohi.ll
…
neg-imm.ll
…
neon-bitcast.ll
…
neon-bitwise-instructions.ll
…
neon-compare-instructions.ll
…
neon-diagnostics.ll
…
neon-dot-product.ll
…
neon-extract.ll
…
neon-fma-FMF.ll
…
neon-fma.ll
…
neon-fpround_f128.ll
…
neon-idiv.ll
…
neon-inline-asm-16-bit-fp.ll
…
neon-mla-mls.ll
…
neon-mov.ll
…
neon-or-combine.ll
…
neon-perm.ll
…
neon-scalar-by-elem-fma.ll
…
neon-scalar-copy.ll
…
neon-shift-left-long.ll
…
neon-truncStore-extLoad.ll
…
nest-register.ll
…
no-fp-asm-clobbers-crash.ll
…
no-quad-ldp-stp.ll
…
no-stack-arg-probe.ll
…
nonlazybind.ll
…
nontemporal.ll
…
nzcv-save.ll
…
O0-pipeline.ll
…
O3-pipeline.ll
…
optimize-cond-branch.ll
…
optimize-imm.ll
…
or-combine.ll
…
overlapping-copy-bundle-cycle.mir
…
overlapping-copy-bundle.mir
…
paired-load.ll
…
PBQP-chain.ll
…
PBQP-coalesce-benefit.ll
…
PBQP-csr.ll
…
PBQP.ll
…
phi-dbg.ll
…
pic-eh-stubs.ll
…
pie.ll
…
post-ra-machine-sink.mir
…
postra-mi-sched.ll
…
pow.ll
[DAGCombiner] try to convert pow(x, 0.25) to sqrt(sqrt(x))
2018-09-05 17:01:56 +00:00
pr27816.ll
…
pr33172.ll
…
preferred-alignment.ll
…
preferred-function-alignment.ll
…
prefixdata.ll
…
preserve_mostcc.ll
…
print-mrs-system-register.ll
…
prologue-epilogue-remarks.mir
…
ragreedy-csr.ll
…
rbit.ll
…
readcyclecounter.ll
…
recp-fastmath.ll
…
redundant-copy-elim-empty-mbb.ll
…
Redundantstore.ll
…
reg-scavenge-frame.mir
…
regcoal-physreg.mir
…
regress-bitcast-formals.ll
…
regress-f128csel-flags.ll
…
regress-fp128-livein.ll
…
regress-tail-livereg.ll
…
regress-tblgen-chains.ll
…
regress-w29-reserved-with-fp.ll
…
rem_crash.ll
…
remat-float0.ll
…
remat.ll
…
returnaddr.ll
…
reverse-csr-restore-seq.mir
…
rm_redundant_cmp.ll
…
rotate-extract.ll
…
rotate.ll
…
round-conv.ll
…
sat-add.ll
[AArch64] test codegen for unsigned saturated add; NFC
2018-09-11 13:21:28 +00:00
sched-past-vector-ldst.ll
…
scheduledag-constreg.mir
…
sdivpow2.ll
…
selectcc-to-shiftand.ll
…
selectiondag-order.ll
…
setcc-takes-i32.ll
…
setcc-type-mismatch.ll
…
shadow-call-stack.ll
…
shift-mod.ll
…
shrink-wrap.ll
…
shrink-wrapping-vla.ll
…
sibling-call.ll
…
sign-return-address.ll
[AArch64] - Generate pointer authentication instructions
2018-08-17 12:53:22 +00:00
signbit-shift.ll
…
signed-truncation-check.ll
[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern
2018-09-02 13:56:22 +00:00
simple-macho.ll
…
sincos-expansion.ll
…
sincospow-vector-expansion.ll
…
sink-copy-for-shrink-wrap.ll
…
sitofp-fixed-legal.ll
…
special-reg.ll
…
spill-fold.ll
…
spill-fold.mir
…
spill-stack-realignment.mir
…
spill-undef.mir
…
sqrt-fastmath.ll
…
stack_guard_remat.ll
…
stack-guard-remat-bitcast.ll
…
stack-protector-target.ll
…
stackguard-internal.ll
…
stackmap-frame-setup.ll
…
stackmap-liveness.ll
…
store_merge_pair_offset.ll
…
strqro.ll
…
strqu.ll
…
sub1.ll
…
subs-to-sub-opt.ll
…
swift-error.ll
…
swift-return.ll
…
swiftcc.ll
…
swifterror.ll
…
swiftself-scavenger.ll
…
swiftself.ll
…
tail-call.ll
…
tailcall_misched_graph.ll
…
tailcall-ccmismatch.ll
…
tailcall-explicit-sret.ll
…
tailcall-fastisel.ll
…
tailcall-implicit-sret.ll
…
tailcall-mem-intrinsics.ll
…
tailcall-string-rvo.ll
…
taildup-cfi.ll
…
tailmerging_in_mbp.ll
…
tbi.ll
…
tbz-tbnz.ll
…
tiny_model.ll
[AArch64] Optimise load(adr address) to ldr address
2018-08-30 11:55:16 +00:00
tiny_supported.ll
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
trunc-v1i64.ll
…
tst-br.ll
…
umulo-128-legalisation-lowering.ll
[SelectionDAG] Improve the legalisation lowering of UMULO.
2018-08-16 18:39:39 +00:00
unfold-masked-merge-scalar-constmask-innerouter.ll
Extend hasStoreToStackSlot with list of FI accesses.
2018-09-03 09:15:58 +00:00
unfold-masked-merge-scalar-constmask-interleavedbits.ll
Extend hasStoreToStackSlot with list of FI accesses.
2018-09-03 09:15:58 +00:00
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
Extend hasStoreToStackSlot with list of FI accesses.
2018-09-03 09:15:58 +00:00
unfold-masked-merge-scalar-constmask-lowhigh.ll
Extend hasStoreToStackSlot with list of FI accesses.
2018-09-03 09:15:58 +00:00
unfold-masked-merge-scalar-variablemask.ll
Extend hasStoreToStackSlot with list of FI accesses.
2018-09-03 09:15:58 +00:00
unfold-masked-merge-vector-variablemask-const.ll
…
unfold-masked-merge-vector-variablemask.ll
…
unreachable-emergency-spill-slot.mir
…
urem-seteq-optsize.ll
[NFC][CodeGen][SelectionDAG] Tests for X % C == 0 codegen improvement.
2018-08-30 09:32:21 +00:00
urem-seteq-vec-nonsplat.ll
[DagCombine][NFC] Some more tests fo for X % C == 0 (UREM case) transform
2018-09-11 15:34:26 +00:00
urem-seteq-vec-splat.ll
[DagCombine][NFC] Some more tests fo for X % C == 0 (UREM case) transform
2018-09-11 15:34:26 +00:00
urem-seteq.ll
[NFC][CodeGen][SelectionDAG] Tests for X % C == 0 codegen improvement.
2018-08-30 09:32:21 +00:00
vcvt-oversize.ll
…
vec-libcalls.ll
Extend hasStoreToStackSlot with list of FI accesses.
2018-09-03 09:15:58 +00:00
vecreduce-propagate-sd-flags.ll
…
vector_merge_dep_check.ll
…
vector-fcopysign.ll
…
win64_vararg.ll
…
win_cst_pool.ll
…
win-alloca-no-stack-probe.ll
…
win-alloca.ll
…
win-tls.ll
…
xbfiz.ll
…
xray-attribute-instrumentation.ll
…
xray-tail-call-sled.ll
…
zero-reg.ll
…
zext-logic-shift-load.ll
…