Stefan Maksimovic 58f225b371 [mips] Alter register classes for MSA pseudo f16 instructions ...

This change introduces additional machine instructions in functions
dealing with the expansion of msa pseudo f16 instructions due to
register classes being inappropriate when checked with machine
verifier.

Differential Revision: https://reviews.llvm.org/D34276

llvm-svn: 308301

2017-07-18 12:05:35 +00:00

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2r_vector_scalar.ll

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2r.ll

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2rf_exup.ll

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2rf_float_int.ll

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2rf_fq.ll

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2rf_int_float.ll

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2rf_tq.ll

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2rf.ll

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3r_4r_widen.ll

[mips][msa] Prevent output operand from commuting for dpadd_[su].df ins

2017-03-31 14:31:55 +00:00

3r_4r.ll

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3r_splat.ll

[mips][msa] Splat.d endianness check

2017-06-23 09:09:31 +00:00

3r-a.ll

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3r-b.ll

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3r-c.ll

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3r-d.ll

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3r-i.ll

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3r-m.ll

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3r-p.ll

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3r-s.ll

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3r-v.ll

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3rf_4rf_q.ll

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3rf_4rf.ll

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3rf_exdo.ll

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3rf_float_int.ll

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3rf_int_float.ll

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3rf_q.ll

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3rf.ll

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arithmetic_float.ll

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arithmetic.ll

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basic_operations_float.ll

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basic_operations.ll

[mips][msa] Accept more values for constant splats

2017-03-10 13:27:14 +00:00

bit.ll

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bitcast.ll

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bitwise.ll

[mips][msa] Fix generation of bm(n)zi and bins[lr]i instructions

2017-04-07 13:31:36 +00:00

bmzi_bmnzi.ll

Elide stores which are overwritten without being observed.

2017-05-16 19:43:56 +00:00

compare_float.ll

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compare.ll

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elm_copy.ll

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elm_cxcmsa.ll

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elm_insv.ll

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elm_move.ll

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elm_shift_slide.ll

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endian.ll

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f16-llvm-ir.ll

[mips] Alter register classes for MSA pseudo f16 instructions

2017-07-18 12:05:35 +00:00

fexuprl.ll

[mips] Add tests for half precision floating point support.

2016-11-21 20:34:10 +00:00

frameindex.ll

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i5_ld_st.ll

In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.

2017-03-14 00:34:14 +00:00

i5-a.ll

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i5-b.ll

[mips][msa] Fix generation of bm(n)zi and bins[lr]i instructions

2017-04-07 13:31:36 +00:00

i5-c.ll

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i5-m.ll

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i5-s.ll

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i8.ll

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i10.ll

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immediates-bad.ll

[mips] Fix Mips MSA instrinsics

2017-01-10 16:40:57 +00:00

immediates.ll

[mips][msa] Fix generation of bm(n)zi and bins[lr]i instructions

2017-04-07 13:31:36 +00:00

inline-asm.ll

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llvm-stress-s449609655-simplified.ll

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llvm-stress-s525530439.ll

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llvm-stress-s997348632.ll

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llvm-stress-s1704963983.ll

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llvm-stress-s1935737938.ll

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llvm-stress-s2090927243-simplified.ll

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llvm-stress-s2501752154-simplified.ll

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llvm-stress-s2704903805.ll

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llvm-stress-s3861334421.ll

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llvm-stress-s3926023935.ll

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llvm-stress-s3997499501.ll

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llvm-stress-sz1-s742806235.ll

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msa-nooddspreg.ll

[mips] Honour -mno-odd-spreg for vector splat (again)

2017-01-10 15:53:10 +00:00

shift_constant_pool.ll

[mips][msa] Mask vectors holding shift amounts

2017-04-20 13:26:46 +00:00

shift_no_and.ll

[mips][msa] Mask vectors holding shift amounts

2017-04-20 13:26:46 +00:00

shift-dagcombine.ll

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shuffle.ll

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special.ll

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spill.ll

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vec.ll

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vecs10.ll

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