6cba96ed52
Summary: Experimentally we found that promotion to scalars carries less benefits than sinking and hoisting in LICM. When using MemorySSA, we build an AliasSetTracker on demand in order to reuse the current infrastructure. We only build it if less than AccessCapForMSSAPromotion exist in the loop, a cap that is by default set to 250. This value ensures there are no runtime regressions, and there are small compile time gains for pathological cases. A much lower value (20) was found to yield a single regression in the llvm-test-suite and much higher benefits for compile times. Conservatively we set the current cap to a high value, but we will explore lowering it when MemorySSA is enabled by default. Reviewers: sanjoy, chandlerc Subscribers: nemanjai, jlebar, Prazek, george.burgess.iv, jfb, jsji, llvm-commits Differential Revision: https://reviews.llvm.org/D56625 llvm-svn: 353339
51 lines
1.8 KiB
LLVM
51 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -enable-mssa-loop-dependency=false -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown < %s | \
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; RUN: FileCheck %s
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; RUN: llc -enable-mssa-loop-dependency=true -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown < %s | \
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; RUN: FileCheck %s --check-prefix=MSSA
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; Function Attrs: nounwind
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define void @ec_GFp_nistp256_points_mul() {
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; CHECK-LABEL: ec_GFp_nistp256_points_mul:
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; CHECK: ld 5, 0(3)
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; CHECK: li 3, 127
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; CHECK: li 4, 0
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; CHECK: subfic 6, 5, 0
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; CHECK: subfze 6, 4
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; CHECK: sradi 7, 6, 63
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; CHECK: srad 6, 6, 3
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; CHECK: subfc 5, 5, 7
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; CHECK: subfe 5, 4, 6
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; CHECK: sradi 5, 5, 63
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; With MemorySSA, everything is taken out of the loop by licm.
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; Loads and stores to undef are treated as non-aliasing.
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; MSSA-LABEL: ec_GFp_nistp256_points_mul
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; MSSA: ld 3, 0(3)
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; MSSA: li 4, 0
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; MSSA: subfic 5, 3, 0
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; MSSA: subfze 5, 4
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; MSSA: sradi 5, 5, 63
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; MSSA: subfc 3, 3, 5
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; MSSA: subfe 3, 4, 5
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; MSSA: sradi 3, 3, 63
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; MSSA: std 3, 0(3)
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entry:
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br label %fe_cmovznz.exit.i534.i.15
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fe_cmovznz.exit.i534.i.15: ; preds = %fe_cmovznz.exit.i534.i.15, %entry
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%0 = load i64, i64* undef, align 8
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%1 = load i64, i64* undef, align 8
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%conv.i69.i.i = zext i64 %0 to i128
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%sub.i72.i.i = sub nsw i128 0, %conv.i69.i.i
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%conv.i63.i.i = zext i64 %1 to i128
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%add.neg.i.i.i = ashr i128 %sub.i72.i.i, 127
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%sub.i65.i.i = sub nsw i128 %add.neg.i.i.i, %conv.i63.i.i
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%sub.i65.lobit.i.i = ashr i128 %sub.i65.i.i, 127
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%conv1.i58.i.i = and i128 %sub.i65.lobit.i.i, 18446744073709551615
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%add3.i59.i.i = add nuw nsw i128 %conv1.i58.i.i, 0
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%conv4.i60.i.i = trunc i128 %add3.i59.i.i to i64
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store i64 %conv4.i60.i.i, i64* undef, align 16
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br label %fe_cmovznz.exit.i534.i.15
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}
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