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clang-p2996/llvm/test/CodeGen/PowerPC
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Kit Barton 7c80f98b69 [PPC] Remove Darwin support from POWER backend. 
This patch issues an error message if Darwin ABI is attempted with the PPC
backend. It also cleans up existing test cases, either converting the test to
use an alternative triple or removing the test if the coverage is no longer
needed.

Updated Tests
-------------
The majority of test cases were updated to use a different triple that does not
include the Darwin ABI. Many tests were also updated to use FileCheck, in place
of grep.

Deleted Tests
-------------
llvm/test/tools/dsymutil/PowerPC/sibling.test was originally added to test
specific functionality of dsymutil using an object file created with an old
version of llvm-gcc for a Powerbook G4. After a discussion with @JDevlieghere he
suggested removing the test.

llvm/test/CodeGen/PowerPC/combine_loads_from_build_pair.ll was converted from a
PPC test to a SystemZ test, as the behavior is also reproducible there.

All other tests that were deleted were specific to the darwin/ppc ABI and no
longer necessary.

Phabricator Review: https://reviews.llvm.org/D50988

llvm-svn: 340795
2018-08-28 01:18:29 +00:00
..
2004-11-29-ShrCrash.ll
…
2004-11-30-shift-crash.ll
…
2004-11-30-shr-var-crash.ll
…
2004-12-12-ZeroSizeCommon.ll
…
2005-01-14-SetSelectCrash.ll
…
2005-01-14-UndefLong.ll
…
2005-08-12-rlwimi-crash.ll
…
2005-09-02-LegalizeDuplicatesCalls.ll
…
2005-10-08-ArithmeticRotate.ll
…
2005-11-30-vastart-crash.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2006-01-11-darwin-fp-argument.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2006-01-20-ShiftPartsCrash.ll
…
2006-04-01-FloatDoubleExtend.ll
…
2006-04-05-splat-ish.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2006-04-19-vmaddfp-crash.ll
…
2006-05-12-rlwimi-crash.ll
…
2006-07-07-ComputeMaskedBits.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
2006-07-19-stwbrx-crash.ll
…
2006-08-11-RetVector.ll
…
2006-08-15-SelectionCrash.ll
…
2006-09-28-shift_64.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2006-10-13-Miscompile.ll
…
2006-10-17-brcc-miscompile.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2006-10-17-ppc64-alloca.ll
…
2006-11-10-DAGCombineMiscompile.ll
…
2006-11-29-AltivecFPSplat.ll
…
2006-12-07-LargeAlloca.ll
…
2006-12-07-SelectCrash.ll
…
2007-01-04-ArgExtension.ll
…
2007-01-15-AsmDialect.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-01-29-lbrx-asm.ll
…
2007-01-31-InlineAsmAddrMode.ll
…
2007-02-16-AlignPacked.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-02-16-InlineAsmNConstraint.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-02-23-lr-saved-twice.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-03-24-cntlzd.ll
…
2007-03-30-SpillerCrash.ll
…
2007-04-24-InlineAsm-I-Modifier.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-04-30-InlineAsmEarlyClobber.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-05-03-InlineAsm-S-Constraint.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-05-14-InlineAsmSelectCrash.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-05-22-tailmerge-3.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-05-30-dagcombine-miscomp.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-06-28-BCCISelBug.ll
…
2007-08-04-CoalescerAssert.ll
…
2007-09-04-AltivecDST.ll
…
2007-09-07-LoadStoreIdxForms.ll
…
2007-09-08-unaligned.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-09-11-RegCoalescerAssert.ll
…
2007-09-12-LiveIntervalsAssert.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-10-16-InlineAsmFrameOffset.ll
…
2007-10-18-PtrArithmetic.ll
…
2007-10-21-LocalRegAllocAssert2.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-10-21-LocalRegAllocAssert.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-11-04-CoalescerCrash.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-11-16-landingpad-split.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2007-11-19-VectorSplitting.ll
…
2008-02-05-LiveIntervalsAssert.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-02-09-LocalRegAllocAssert.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-03-05-RegScavengerAssert.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-03-17-RegScavengerCrash.ll
…
2008-03-18-RegScavengerAssert.ll
…
2008-03-24-AddressRegImm.ll
…
2008-03-24-CoalescerBug.ll
…
2008-03-26-CoalescerBug.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-04-10-LiveIntervalCrash.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-04-16-CoalescerBug.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-04-23-CoalescerCrash.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-05-01-ppc_fp128.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-06-19-LegalizerCrash.ll
…
2008-06-21-F128LoadStore.ll
…
2008-06-23-LiveVariablesCrash.ll
…
2008-07-10-SplatMiscompile.ll
…
2008-07-15-Bswap.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-07-15-Fabs.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-07-15-SignExtendInreg.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-07-17-Fneg.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-07-24-PPC64-CCBug.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-09-12-CoalescerBug.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-10-17-AsmMatchingOperands.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-10-28-f128-i32.ll
[Power9] Code Cleanup - Remove needsAggressiveScheduling()
2018-07-19 19:34:18 +00:00
2008-10-28-UnprocessedNode.ll
…
2008-10-31-PPCF128Libcalls.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2008-12-02-LegalizeTypeAssert.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2009-01-16-DeclareISelBug.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2009-03-17-LSRBug.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2009-05-28-LegalizeBRCC.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2009-07-16-InlineAsm-M-Operand.ll
[CodeGen] Print external symbols as $symbol in both MIR and debug output
2017-12-14 10:02:58 +00:00
2009-08-17-inline-asm-addr-mode-breakage.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2009-09-18-carrybit.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2009-11-15-ProcImpDefsBug.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2009-11-25-ImpDefBug.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2010-02-04-EmptyGlobal.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2010-02-12-saveCR.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2010-03-09-indirect-call.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2010-04-01-MachineCSEBug.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2010-05-03-retaddr1.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2010-10-11-Fast-Varargs.ll
…
2010-12-18-PPCStackRefs.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2011-12-05-NoSpillDupCR.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2011-12-06-SpillAndRestoreCR.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
2011-12-08-DemandedBitsMiscompile.ll
…
2012-09-16-TOC-entry-check.ll
…
2012-10-11-dynalloc.ll
…
2012-10-12-bitcast.ll
…
2012-11-16-mischedcall.ll
…
2013-05-15-preinc-fold.ll
…
2013-07-01-PHIElimBug.ll
…
2016-01-07-BranchWeightCrash.ll
…
2016-04-16-ADD8TLS.ll
…
2016-04-17-combine.ll
…
2016-04-28-setjmp.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
a2-fp-basic.ll
…
a2q-stackalign.ll
…
a2q.ll
…
aa-tbaa.ll
…
aantidep-def-ec.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
aantidep-inline-asm-use.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
add-fi.ll
…
addc.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
addegluecrash.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
addi-licm.ll
…
addi-offset-fold.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
addi-reassoc.ll
…
addisdtprelha-nonr3.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
addrfuncstr.ll
…
addrspacecast.ll
[PowerPC] Make AddrSpaceCast noop
2018-03-19 18:50:02 +00:00
aggressive-anti-dep-breaker-subreg.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
alias.ll
…
align.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
allocate-r0.ll
…
altivec-ord.ll
…
and_add.ll
…
and_sext.ll
…
and_sra.ll
…
and-branch.ll
…
and-elim.ll
…
and-imm.ll
…
andc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
anon_aggr.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
anyext_srl.ll
…
arr-fp-arg-no-copy.ll
…
ashr-neg1.ll
…
asm-constraints.ll
…
asm-dialect.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
asm-printer-topological-order.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
asm-Zy.ll
…
asym-regclass-copy.ll
…
atomic-1.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
atomic-2.ll
…
atomic-minmax.ll
…
Atomics-64.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
atomics-constant.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
atomics-fences.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
atomics-indexed.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
atomics-regression.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
atomics.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
available-externally.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
bdzlr.ll
…
big-endian-actual-args.ll
…
big-endian-call-result.ll
…
big-endian-formal-args.ll
…
bitcasts-direct-move.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
bitfieldinsert.ll
[PowerPC] reduce rotate in BitPermutationSelector
2018-06-05 11:58:01 +00:00
blockaddress.ll
…
bool-math.ll
[DAGCombiner] eliminate setcc bool math when input is low-bit of some value
2018-06-24 14:37:30 +00:00
BoolRetToIntTest-2.ll
…
BoolRetToIntTest.ll
…
bperm.ll
[PowerPC] avoid unprofitable Repl32 flag in BitPermutationSelector
2018-06-07 13:21:14 +00:00
branch_coalesce.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
branch-hint.ll
…
branch-opt.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
BreakableToken-reduced.ll
…
bswap64.ll
…
bswap-load-store.ll
…
build-vector-tests.ll
[PowerPC] Improve codegen for vector loads using scalar_to_vector
2018-08-08 15:20:43 +00:00
buildvec_canonicalize.ll
…
builtins-ppc-elf2-abi.ll
…
builtins-ppc-p8vector.ll
…
builtins-ppc-p9-f128.ll
[PowerPC] Emit xscpsgndp instead of xxlor when copying floating point scalar registers for P9
2018-08-24 20:00:24 +00:00
bv-pres-v8i1.ll
…
bv-widen-undef.ll
…
byval-agg-info.ll
[CodeGen] Use MIR syntax for MachineMemOperand printing
2018-03-14 21:52:13 +00:00
byval-aliased.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
calls.ll
…
can-lower-ret.ll
…
cannonicalize-vector-shifts.ll
…
cc.ll
…
change-no-infs.ll
…
cmp_elimination.ll
[PowerPC] fix a bug in redundant compare elimination
2017-12-20 05:18:19 +00:00
cmp-cmp.ll
…
cmpb-ppc32.ll
…
cmpb.ll
…
coalesce-ext.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
code-align.ll
…
coldcc2.ll
Re-commit : [PowerPC] Add handling for ColdCC calling convention and a pass to mark
2018-01-30 16:17:22 +00:00
coldcc.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
combine-to-pre-index-store-crash.ll
…
compare-duplicate.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
compare-simm.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
CompareEliminationSpillIssue.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
complex-return.ll
…
constants-i64.ll
…
constants.ll
…
convert-rr-to-ri-instrs-out-of-range.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
convert-rr-to-ri-instrs-R0-special-handling.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
convert-rr-to-ri-instrs.mir
[PowerPC] Materialize more constants with CR-field set in late peephole
2018-07-13 15:21:03 +00:00
copysignl.ll
…
cr1eq-no-extra-moves.ll
…
cr1eq.ll
…
cr_spilling.ll
…
cr-spills.ll
…
crash.ll
…
crbit-asm-disabled.ll
…
crbit-asm.ll
…
crbits.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
crsave.ll
…
crypto_bifs.ll
…
ctr-cleanup.ll
…
ctr-loop-tls-const.ll
…
ctr-minmaxnum.ll
…
ctrloop-asm.ll
…
ctrloop-cpsgn.ll
…
ctrloop-fp64.ll
…
ctrloop-i64.ll
…
ctrloop-i128.ll
…
ctrloop-intrin.ll
…
ctrloop-large-ec.ll
…
ctrloop-le.ll
…
ctrloop-lt.ll
…
ctrloop-ne.ll
…
ctrloop-reg.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
ctrloop-s000.ll
…
ctrloop-sh.ll
…
ctrloop-shortLoops.ll
…
ctrloop-sums.ll
…
ctrloop-udivti3.ll
…
ctrloops-hot-exit.ll
[PowerPC] Check hot loop exit edge in PPCCTRLoops
2018-02-05 12:25:29 +00:00
ctrloops-softfloat.ll
…
ctrloops.ll
…
cttz.ll
…
cxx_tlscc64.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
darwin-labels.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
dbg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
DbgValueOtherTargets.test
…
dcbt-sched.ll
…
debuginfo-split-int.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debuginfo-stackarg.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
delete-node.ll
…
direct-move-profit.ll
[PPC] Heuristic to choose between a X-Form VSX ld/st vs a X-Form FP ld/st.
2017-11-20 14:38:30 +00:00
div-2.ll
…
div-e-32.ll
…
div-e-all.ll
…
duplicate-returns-for-tailcall.ll
[PowerPC] fix a bug in TCO eligibility check
2017-12-30 08:09:04 +00:00
dyn-alloca-aligned.ll
…
dyn-alloca-offset.ll
…
e500-1.ll
…
early-ret2.ll
…
early-ret.ll
…
ec-input.ll
…
eh-dwarf-cfa.ll
…
empty-functions.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
emptystruct.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
emutls_generic.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
eqv-andc-orc-nor.ll
…
expand-contiguous-isel.ll
[PowerPC] Partially enable the ISEL expansion pass.
2017-12-11 20:42:37 +00:00
expand-foldable-isel.ll
[PowerPC] Partially enable the ISEL expansion pass.
2017-12-11 20:42:37 +00:00
expand-isel-1.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
expand-isel-2.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
expand-isel-3.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
expand-isel-4.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
expand-isel-5.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
expand-isel-6.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
expand-isel-7.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
expand-isel-8.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
expand-isel-9.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
expand-isel-10.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
expand-isel.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
ext-bool-trunc-repl.ll
…
extra-toc-reg-deps.ll
Re-commit: [MachineLICM] Add functions to MachineLICM to hoist invariant stores
2018-03-23 15:28:15 +00:00
extsh.ll
…
extswsli.ll
[PowerPC] Recommit r340016 after fixing the reported issue
2018-08-27 11:20:27 +00:00
f32-to-i64.ll
…
f128-aggregates.ll
[PowerPC] [NFC] Update __float128 tests
2018-07-12 20:18:57 +00:00
f128-arith.ll
[PowerPC] [NFC] Update __float128 tests
2018-07-12 20:18:57 +00:00
f128-compare.ll
[PowerPC] [NFC] Update __float128 tests
2018-07-12 20:18:57 +00:00
f128-conv.ll
[PowerPC] Emit xscpsgndp instead of xxlor when copying floating point scalar registers for P9
2018-08-24 20:00:24 +00:00
f128-fma.ll
[PowerPC] [NFC] Update __float128 tests
2018-07-12 20:18:57 +00:00
f128-passByValue.ll
[PowerPC] Emit xscpsgndp instead of xxlor when copying floating point scalar registers for P9
2018-08-24 20:00:24 +00:00
f128-rounding.ll
[PowerPC] [NFC] Update __float128 tests
2018-07-12 20:18:57 +00:00
f128-truncateNconv.ll
[PowerPC] [NFC] Update __float128 tests
2018-07-12 20:18:57 +00:00
f128-vecExtractNconv.ll
[PowerPC] [NFC] Update __float128 tests
2018-07-12 20:18:57 +00:00
fabs.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
fast-isel-binary.ll
…
fast-isel-br-const.ll
…
fast-isel-call.ll
[PPC] Also disable the pre-emit version of reg+reg to reg+imm transformation.
2017-12-18 19:21:56 +00:00
fast-isel-cmp-imm.ll
Introduce codegen for the Signal Processing Engine
2018-07-18 04:25:10 +00:00
fast-isel-const.ll
…
fast-isel-conversion-p5.ll
…
fast-isel-conversion.ll
Introduce codegen for the Signal Processing Engine
2018-07-18 04:25:10 +00:00
fast-isel-crash.ll
…
fast-isel-ext.ll
…
fast-isel-fcmp-nan.ll
…
fast-isel-fold.ll
…
fast-isel-fpconv.ll
…
fast-isel-GEP-coalesce.ll
…
fast-isel-i64offset.ll
…
fast-isel-icmp-split.ll
…
fast-isel-indirectbr.ll
…
fast-isel-load-store-vsx.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
fast-isel-load-store.ll
Introduce codegen for the Signal Processing Engine
2018-07-18 04:25:10 +00:00
fast-isel-redefinition.ll
…
fast-isel-ret.ll
…
fast-isel-shifter.ll
…
fastcc_stacksize.ll
[PowerPC] Reduce stack frame for fastcc functions by only allocating parameter save area when needed
2018-02-20 15:09:45 +00:00
fastisel-gep-promote-before-add.ll
…
fcpsgn.ll
…
fdiv-combine.ll
…
float-asmprint.ll
…
float-to-int.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
floatPSA.ll
…
flt-preinc.ll
…
fma-aggr-FMF.ll
Utilize new SDNode flag functionality to expand current support for fma
2018-06-16 00:03:06 +00:00
fma-assoc.ll
…
fma-ext.ll
…
fma-mutate-duplicate-vreg.ll
…
fma-mutate-register-constraint.ll
…
fma-mutate.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
fma.ll
…
fmaxnum.ll
…
fmf-propagation.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
fminnum.ll
…
fnabs.ll
…
fneg.ll
…
fold-li.ll
…
fold-zero.ll
…
fp2int2fp-ppcfp128.ll
…
fp64-to-int16.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
fp128-bitcast-after-operation.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
fp_to_uint.ll
…
fp-branch.ll
…
fp-int128-fp-combine.ll
[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
2018-06-27 18:16:40 +00:00
fp-int-conversions-direct-moves.ll
…
fp-int-fp.ll
…
fp-splat.ll
…
fp-to-int-ext.ll
…
fp-to-int-to-fp.ll
[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
2018-06-27 18:16:40 +00:00
fpcopy.ll
…
frame-size.ll
…
frameaddr.ll
…
Frames-alloca.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
Frames-large.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
Frames-leaf.ll
…
Frames-small.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
frounds.ll
…
fsel.ll
…
fsl-e500mc.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
fsl-e5500.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
fsqrt.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
fsub-fneg.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
ftrunc-vec.ll
[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
2018-06-27 18:16:40 +00:00
func-addr-consts.ll
…
func-addr.ll
…
funnel-shift-rot.ll
[SelectionDAG] try harder to convert funnel shift to rotate
2018-08-09 17:26:22 +00:00
funnel-shift.ll
[SelectionDAG] fix bug in translating funnel shift with non-power-of-2 type
2018-08-01 17:17:08 +00:00
glob-comp-aa-crash.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
gpr-vsr-spill.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
hello-reloc.s
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
hello.ll
…
hidden-vis-2.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
hidden-vis.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
htm.ll
…
i1-ext-fold.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
i1-to-double.ll
[Power9] Code Cleanup - Remove needsAggressiveScheduling()
2018-07-19 19:34:18 +00:00
i32-to-float.ll
…
i64_fp_round.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
i64_fp.ll
…
i64-to-float.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
i128-and-beyond.ll
…
ia-mem-r0.ll
…
ia-neg-const.ll
…
iabs.ll
…
ifcvt-forked-bug-2016-08-08.ll
…
ifcvt.ll
…
illegal-element-type.ll
…
in-asm-f64-reg.ll
…
indexed-load.ll
…
indirect-hidden.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
indirectbr.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
inline-asm-s-modifier.ll
…
inline-asm-scalar-to-vector-error.ll
…
inlineasm-copy.ll
…
inlineasm-i64-reg.ll
…
int-fp-conv-0.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
int-fp-conv-1.ll
…
inverted-bool-compares.ll
…
isel-rc-nox0.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
isel.ll
…
ispositive.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
itofp128.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
jaggedstructs.ll
…
LargeAbsoluteAddr.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
lbz-from-ld-shift.ll
…
lbzux.ll
…
ld-st-upd.ll
…
ldtoc-inv.ll
…
lha.ll
…
licm-remat.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
licm-tocReg.ll
[PowerPC] Return true in enableMultipleCopyHints().
2018-01-31 09:26:51 +00:00
lit.local.cfg
…
livephysregs.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
load-constant-addr.ll
…
load-shift-combine.ll
…
load-two-flts.ll
[PowerPC] Return true in enableMultipleCopyHints().
2018-01-31 09:26:51 +00:00
load-v4i8-improved.ll
[PowerPC] Improve codegen for vector loads using scalar_to_vector
2018-08-08 15:20:43 +00:00
logic-ops-on-compares.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
long-compare.ll
…
longcall.ll
…
longdbl-truncate.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
loop-data-prefetch-inner.ll
…
loop-data-prefetch.ll
…
loop-hoist-toc-save.ll
Re-commit: [MachineLICM] Add functions to MachineLICM to hoist invariant stores
2018-03-23 15:28:15 +00:00
loop-prep-all.ll
…
lsa.ll
[Power9] Code Cleanup - Remove needsAggressiveScheduling()
2018-07-19 19:34:18 +00:00
lsr-postinc-pos.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
lxv-aligned-stack-slots.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
lxvw4x-bug.ll
…
machine-combiner.ll
[FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests
2018-07-11 20:25:49 +00:00
mask64.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
mature-mc-support.ll
Run these tests, the errors were old and not valid anymore.
2018-02-16 23:02:28 +00:00
mc-instrlat.ll
…
mcm-1.ll
…
mcm-2.ll
…
mcm-3.ll
…
mcm-4.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
mcm-5.ll
…
mcm-6.ll
…
mcm-7.ll
…
mcm-8.ll
…
mcm-9.ll
…
mcm-10.ll
…
mcm-11.ll
…
mcm-12.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
mcm-13.ll
…
mcm-default.ll
…
mcm-obj-2.ll
…
mcm-obj.ll
…
mcount-insertion.ll
…
MCSE-caller-preserved-reg.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
mem_update.ll
…
mem-rr-addr-mode.ll
…
memcmp-mergeexpand.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
memcmp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
memcmpIR.ll
…
memCmpUsedInZeroEqualityComparison.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
memcpy_dereferenceable.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memcpy-vec.ll
[FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests
2018-07-11 20:25:49 +00:00
memset-nc-le.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memset-nc.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
merge_stores_dereferenceable.ll
…
merge-st-chain-op.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
MergeConsecutiveStores.ll
[Power9] Code Cleanup - Remove needsAggressiveScheduling()
2018-07-19 19:34:18 +00:00
mftb.ll
…
misched-inorder-latency.ll
…
misched.ll
…
MMO-flags-assertion.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
mtvsrdd.ll
…
mul-neg-power-2.ll
…
mul-with-overflow.ll
…
mulhs.ll
…
mulli64.ll
…
mult-alt-generic-powerpc64.ll
…
mult-alt-generic-powerpc.ll
…
multi-return.ll
…
named-reg-alloc-r0.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
named-reg-alloc-r1-64.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
named-reg-alloc-r1.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
named-reg-alloc-r2-64.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
named-reg-alloc-r2.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
named-reg-alloc-r13-64.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
named-reg-alloc-r13.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
neg.ll
…
negate-i1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
negctr.ll
…
no-ctr-loop-if-exit-in-nested-loop.ll
[PowerPC] No CTR loop if the candidate exiting block is in a different loop
2018-05-02 22:56:04 +00:00
no-dead-strip.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
no-dup-of-bdnz.ll
[PowerPC] Mark the BDNZ intrinsic as NoDuplicate
2018-04-17 13:07:01 +00:00
no-dup-spill-fp.ll
…
no-ext-with-count-zeros.ll
…
no-extra-fp-conv-ldst.ll
[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
2018-06-27 18:16:40 +00:00
no-pref-jumps.ll
…
no-rlwimi-trivial-commute.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
non-simple-args-intrin.ll
[PowerPC] Can not assume an intrinsic argument is a simple type.
2018-01-09 03:03:41 +00:00
noPermuteFormasking.ll
[PowerPC] Do not emit record-form rotates when record-form andi suffices
2018-03-05 19:27:16 +00:00
novrsave.ll
…
opt-cmp-inst-cr0-live.ll
[CodeGen] Don't omit any redundant information in -debug output
2018-02-26 15:23:42 +00:00
opt-li-add-to-addi.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
opt-sub-inst-cr0-live.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
optcmp.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
optnone-crbits-i1-ret.ll
…
or-addressing-mode.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
ori_imm32.ll
…
p8-isel-sched.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
p8-scalar_vector_conversions.ll
[PowerPC] Change Test Options [NFC]
2018-08-24 19:24:20 +00:00
p8altivec-shuffles-pred.ll
…
p9_copy_fp.ll
[PowerPC] Emit xscpsgndp instead of xxlor when copying floating point scalar registers for P9
2018-08-24 20:00:24 +00:00
p9-vector-compares-and-counts.ll
…
p9-vinsert-vextract.ll
[Power9] Fix the resource list for the COPY instruction.
2018-03-27 17:51:53 +00:00
p9-xxinsertw-xxextractuw.ll
[PPC] Heuristic to choose between a X-Form VSX ld/st vs a X-Form FP ld/st.
2017-11-20 14:38:30 +00:00
peephole-align.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
pie.ll
…
pip-inner.ll
…
popcnt.ll
…
post-ra-ec.ll
…
power9-moves-and-splats.ll
[PowerPC] Improve codegen for vector loads using scalar_to_vector
2018-08-08 15:20:43 +00:00
ppc32-align-long-double-sf.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
ppc32-constant-BE-ppcf128.ll
…
ppc32-cyclecounter.ll
…
ppc32-i1-vaarg.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
ppc32-lshrti3.ll
…
ppc32-nest.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
ppc32-pic-large.ll
[PowerPC] Secure PLT support
2018-03-27 11:23:53 +00:00
ppc32-pic.ll
…
ppc32-skip-regs.ll
…
ppc32-vacopy.ll
[Power9] Code Cleanup - Remove needsAggressiveScheduling()
2018-07-19 19:34:18 +00:00
ppc64-32bit-addic.ll
…
ppc64-abi-extend.ll
…
ppc64-align-long-double.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
ppc64-altivec-abi.ll
…
ppc64-anyregcc-crash.ll
…
ppc64-anyregcc.ll
…
ppc64-blnop.ll
…
ppc64-byval-align.ll
[PowerPC] Return true in enableMultipleCopyHints().
2018-01-31 09:26:51 +00:00
ppc64-calls.ll
…
ppc64-crash.ll
…
ppc64-cyclecounter.ll
…
ppc64-elf-abi.ll
…
ppc64-fastcc-fast-isel.ll
…
ppc64-fastcc.ll
…
ppc64-func-desc-hoist.ll
Re-commit: [MachineLICM] Add functions to MachineLICM to hoist invariant stores
2018-03-23 15:28:15 +00:00
ppc64-gep-opt.ll
[Power9] Code Cleanup - Remove needsAggressiveScheduling()
2018-07-19 19:34:18 +00:00
ppc64-get-cache-line-size.ll
…
ppc64-i128-abi.ll
…
ppc64-icbt-pwr7.ll
…
ppc64-icbt-pwr8.ll
…
ppc64-linux-func-size.ll
…
ppc64-nest.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
ppc64-nonfunc-calls.ll
…
ppc64-P9-mod.ll
…
ppc64-P9-vabsd.ll
[PowerPC] fix incorrect vectorization of abs() on POWER9
2018-04-21 09:32:17 +00:00
ppc64-patchpoint.ll
…
ppc64-pre-inc-no-extra-phi.ll
…
ppc64-prefetch.ll
…
ppc64-r2-alloc.ll
…
ppc64-sibcall-shrinkwrap.ll
…
ppc64-sibcall.ll
[PowerPC] fix a bug in TCO eligibility check
2017-12-30 08:09:04 +00:00
ppc64-smallarg.ll
…
ppc64-stackmap-nops.ll
…
ppc64-stackmap.ll
…
ppc64-toc.ll
…
ppc64-vaarg-int.ll
…
ppc64-zext.ll
…
ppc64le-aggregates.ll
…
ppc64le-calls.ll
…
ppc64le-crsave.ll
…
ppc64le-localentry-large.ll
…
ppc64le-localentry.ll
…
ppc64le-smallarg.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
ppc440-fp-basic.ll
…
ppc440-msync.ll
…
ppc-crbits-onoff.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
ppc-ctr-dead-code.ll
…
ppc-empty-fs.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
ppc-label.ll
[PowerPC] Fix label address calculation for ppc32
2018-06-19 13:07:40 +00:00
ppc-prologue.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
ppc-redzone-alignment-bug.ll
Revert "[PowerPC] Manually schedule the prologue and epilogue"
2018-01-12 13:12:49 +00:00
ppc-shrink-wrapping.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
ppc-vaarg-agg.ll
…
ppcf128-1-opt.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
ppcf128-1.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
ppcf128-2.ll
…
ppcf128-3.ll
…
ppcf128-4.ll
…
ppcf128-endian.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
ppcf128sf.ll
…
ppcsoftops.ll
…
pr3711_widen_bit.ll
…
pr12757.ll
…
pr13641.ll
…
pr13891.ll
…
pr15031.ll
…
pr15359.ll
…
pr15630.ll
…
pr15632.ll
[PowerPC] preserve test intent by removing undef
2018-05-16 22:48:48 +00:00
pr16556-2.ll
…
pr16556.ll
…
pr16573.ll
…
pr17168.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
pr17354.ll
…
pr18663-2.ll
…
pr18663.ll
…
pr20442.ll
…
pr22711.ll
…
pr24216.ll
…
pr24546.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
pr24636.ll
…
pr25157-peephole.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
pr25157.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
pr26180.ll
…
pr26193.ll
…
pr26356.ll
…
pr26378.ll
…
pr26381.ll
…
pr26617.ll
…
pr26690.ll
…
pr27078.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
pr27350.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
pr28130.ll
…
pr28630.ll
…
pr30451.ll
…
pr30640.ll
…
pr30663.ll
…
pr30715.ll
[PowerPC] Remove the match pattern in the definition of LXSDX/STXSDX
2018-05-24 03:20:28 +00:00
pr31144.ll
…
pr32063.ll
…
pr32140.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr33093.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
pr33547.ll
[PowerPC] Disable shrink-wrapping when getting PC address through the LR
2018-02-23 23:08:34 +00:00
pr35402.ll
[PPC] Avoid non-simple MVT in STBRX optimization
2018-03-15 17:49:12 +00:00
pr35688.ll
[PowerPC] Fix for PR35688 - handle out-of-range values for r+r to r+i conversion
2017-12-29 12:22:27 +00:00
pr36068.ll
[PowerPC] Tell VSX swap removal that scalar conversions are lane-sensitive
2018-02-01 21:09:04 +00:00
pr36292.ll
[PowerPC] Do not produce invalid CTR loop with an FRem
2018-02-22 03:02:41 +00:00
pr38087.ll
[PowerPC] Don't run BV DAG Combine before legalization if it assumes legal types
2018-08-15 12:58:13 +00:00
PR3488.ll
…
PR33636.ll
…
PR33671.ll
…
PR35812-neg-cmpxchg.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
pre-inc-disable.ll
[PowerPC] Generate lxsd instead of the ld->mtvsrd sequence for vector loads
2018-08-17 15:15:26 +00:00
preemption.ll
…
preinc-ld-sel-crash.ll
…
preincprep-i64-check.ll
[PowerPC] Don't make it as pre-inc candidate if displacement isn't 4's multiple for i64 pre-inc load/store
2018-07-02 05:46:09 +00:00
preincprep-invoke.ll
…
preincprep-nontrans-crash.ll
…
private.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
pwr3-6x.ll
…
pwr7-gt-nop.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
pzero-fp-xored.ll
…
qpx-bv-sint.ll
[PowerPC] fix tests to be independent of FP undef
2018-03-10 16:14:05 +00:00
qpx-bv.ll
…
qpx-func-clobber.ll
…
qpx-load-splat.ll
[PowerPC] Improve codegen for vector loads using scalar_to_vector
2018-08-08 15:20:43 +00:00
qpx-load.ll
…
qpx-recipest.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
qpx-rounding-ops.ll
…
qpx-s-load.ll
…
qpx-s-sel.ll
…
qpx-s-store.ll
…
qpx-sel.ll
…
qpx-split-vsetcc.ll
…
qpx-store.ll
…
qpx-unal-cons-lds.ll
…
qpx-unalperm.ll
…
quadint-return.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
r31.ll
…
recipest.ll
…
reg-coalesce-simple.ll
…
reg-names.ll
First step towards more human-friendly PPC assembler output:
2017-11-29 23:05:56 +00:00
reloc-align.ll
…
remap-crash.ll
…
remat-imm.ll
…
remove-redundant-moves.ll
…
remove-redundant-toc-saves.ll
[PowerPC] Remove redundant TOC saves
2017-11-27 20:26:36 +00:00
resolvefi-basereg.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
resolvefi-disp.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
restore-r30.ll
…
retaddr2.ll
…
retaddr.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
return-val-i128.ll
…
rlwimi2.ll
…
rlwimi3.ll
…
rlwimi-and-or-bits.ll
…
rlwimi-and.ll
…
rlwimi-commute.ll
…
rlwimi-dyn-and.ll
…
rlwimi-keep-rsh.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
rlwimi.ll
…
rlwinm2.ll
…
rlwinm_rldicl_to_andi.mir
[PowerPC] Materialize more constants with CR-field set in late peephole
2018-07-13 15:21:03 +00:00
rlwinm-zero-ext.ll
[PowerPC] Do not emit record-form rotates when record-form andi suffices
2018-03-05 19:27:16 +00:00
rlwinm.ll
…
rm-zext.ll
…
rotl-2.ll
…
rotl-64.ll
…
rotl-rotr-crash.ll
…
rotl.ll
…
rounding-ops.ll
…
rs-undef-use.ll
…
s000-alias-misched.ll
…
save-bp.ll
…
save-cr-ppc32svr4.ll
[Power9] Code Cleanup - Remove needsAggressiveScheduling()
2018-07-19 19:34:18 +00:00
save-crbp-ppc32svr4.ll
[Power9] Code Cleanup - Remove needsAggressiveScheduling()
2018-07-19 19:34:18 +00:00
scalar_vector_test_1.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
scalar_vector_test_2.ll
[PowerPC] Improve codegen for vector loads using scalar_to_vector
2018-08-08 15:20:43 +00:00
scalar_vector_test_3.ll
[PowerPC] Improve codegen for vector loads using scalar_to_vector
2018-08-08 15:20:43 +00:00
scalar_vector_test_4.ll
[PowerPC] Improve codegen for vector loads using scalar_to_vector
2018-08-08 15:20:43 +00:00
scavenging.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
sdag-ppcf128.ll
…
sdiv-pow2.ll
…
sections.ll
…
select_const.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
select_lt0.ll
…
select-addrRegRegOnly.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
select-cc.ll
…
select-i1-vs-i1.ll
[PowerPC] Return true in enableMultipleCopyHints().
2018-01-31 09:26:51 +00:00
selectiondag-extload-computeknownbits.ll
…
selectiondag-sextload.ll
…
set0-v8i16.ll
…
setcc_no_zext.ll
…
setcc-logic.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
setcc-to-sub.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
setcclike-or-comb.ll
…
seteq-0.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
shift128.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
shift_mask.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shift-cmp.ll
…
shl_elim.ll
…
shl_sext.ll
…
sign_ext_inreg1.ll
…
signbit-shift.ll
[DAGCombiner] transform sub-of-shifted-signbit to add
2018-07-30 22:21:37 +00:00
simplifyConstCmpToISEL.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
sj-ctr-loop.ll
…
sjlj_no0x.ll
…
sjlj.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
small-arguments.ll
…
spe.ll
Introduce codegen for the Signal Processing Engine
2018-07-18 04:25:10 +00:00
spill-nor0.ll
…
splat-bug.ll
…
splat-larger-types-as-v16i8.ll
…
split-index-tc.ll
…
srl-mask.ll
…
stack-no-redzone.ll
…
stack-protector.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
stack-realign.ll
…
stackmap-frame-setup.ll
…
stacksize.ll
…
std-unal-fi.ll
…
stdux-constuse.ll
…
stfiwx-2.ll
…
stfiwx.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
store_fptoi.ll
[PowerPC] Remove the match pattern in the definition of LXSDX/STXSDX
2018-05-24 03:20:28 +00:00
store-constant.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
store-load-fwd.ll
…
store-update.ll
…
structsinmem.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
structsinregs.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
stubs.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
stwu8.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
stwu-gta.ll
…
stwux.ll
…
sub-bv-types.ll
…
subc.ll
…
subreg-postra-2.ll
…
subreg-postra.ll
…
subtract_from_imm.ll
…
svr4-redzone.ll
…
swaps-le-1.ll
[FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests
2018-07-11 20:25:49 +00:00
swaps-le-2.ll
…
swaps-le-3.ll
…
swaps-le-4.ll
…
swaps-le-5.ll
…
swaps-le-6.ll
[PowerPC] Improve codegen for vector loads using scalar_to_vector
2018-08-08 15:20:43 +00:00
swaps-le-7.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
tail-dup-analyzable-fallthrough.ll
…
tail-dup-branch-to-fallthrough.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
tail-dup-break-cfg.ll
…
tail-dup-layout.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
tailcall1-64.ll
…
tailcall1.ll
…
tailcall-string-rvo.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
tailcallpic1.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
test-and-cmp-folding.ll
[PowerPC] Implement isMaskAndCmp0FoldingBeneficial
2018-05-02 23:55:23 +00:00
testBitReverse.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesi32gtu.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesi32leu.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesi32ltu.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesieqsc.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesieqsi.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesieqsll.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesieqss.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesiequc.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesiequi.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesiequll.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesiequs.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesigesc.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesigesi.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesigesll.ll
[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)
2018-07-15 16:27:07 +00:00
testComparesigess.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesigeuc.ll
[PowerPC] Follow-up to r318436 to get the missed CSE opportunities
2017-12-12 12:09:34 +00:00
testComparesigeui.ll
[PowerPC] Sign-extend negative constant stores
2017-12-11 14:35:48 +00:00
testComparesigeull.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesigeus.ll
[PowerPC] Follow-up to r318436 to get the missed CSE opportunities
2017-12-12 12:09:34 +00:00
testComparesigtsc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesigtsi.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesigtsll.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesigtss.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesigtuc.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesigtui.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesigtus.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesilesc.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesilesi.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesilesll.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesiless.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesileuc.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesileui.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesileull.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesileus.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesiltsc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesiltsi.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesiltsll.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesiltss.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesiltuc.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesiltui.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesiltus.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesinesc.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesinesi.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesinesll.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesiness.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesineuc.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesineui.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesineull.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesineus.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testCompareslleqsc.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testCompareslleqsi.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testCompareslleqsll.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testCompareslleqss.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesllequc.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesllequi.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesllequll.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesllequs.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesllgesc.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesllgesi.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesllgesll.ll
[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)
2018-07-15 16:27:07 +00:00
testComparesllgess.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesllgeuc.ll
[PowerPC] Follow-up to r318436 to get the missed CSE opportunities
2017-12-12 12:09:34 +00:00
testComparesllgeui.ll
[PowerPC] Sign-extend negative constant stores
2017-12-11 14:35:48 +00:00
testComparesllgeull.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesllgeus.ll
[PowerPC] Follow-up to r318436 to get the missed CSE opportunities
2017-12-12 12:09:34 +00:00
testComparesllgtsll.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesllgtuc.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesllgtui.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesllgtus.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testCompareslllesc.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testCompareslllesi.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testCompareslllesll.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesllless.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesllleuc.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesllleui.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesllleull.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesllleus.ll
[PowerPC] Recommit r314244 with refactoring and off by default
2017-11-30 13:39:10 +00:00
testComparesllltsll.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesllltuc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesllltui.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesllltus.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
testComparesllnesll.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
testComparesllneull.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
thread-pointer.ll
…
tls_get_addr_clobbers.ll
Revert "[PowerPC] Manually schedule the prologue and epilogue"
2018-01-12 13:12:49 +00:00
tls_get_addr_fence1.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
tls_get_addr_fence2.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
tls_get_addr_stackframe.ll
…
tls-cse.ll
…
tls-pic.ll
…
tls-pie-xform.ll
[PowerPC] Optimize TLS initial-exec sequence to use X-Form loads/stores
2018-03-15 15:34:41 +00:00
tls-store2.ll
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tls.ll
[Power9] Code Cleanup - Remove needsAggressiveScheduling()
2018-07-19 19:34:18 +00:00
toc-float.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
toc-load-sched-bug.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
trampoline.ll
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trunc-srl-load.ll
[DAGCombine] Improve ReduceLoad for SRL
2018-04-09 08:16:11 +00:00
uint-to-ppcfp128-crash.ll
[PowerPC] Fix parest build failure in SPEC2017.
2017-12-21 15:42:50 +00:00
umulo-128-legalisation-lowering.ll
[SelectionDAG] Improve the legalisation lowering of UMULO.
2018-08-16 18:39:39 +00:00
unal4-std.ll
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unal-altivec2.ll
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unal-altivec-wint.ll
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unal-altivec.ll
[Power9] Code Cleanup - Remove needsAggressiveScheduling()
2018-07-19 19:34:18 +00:00
unal-vec-ldst.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
unal-vec-negarith.ll
[CodeGen] Use MIR syntax for MachineMemOperand printing
2018-03-14 21:52:13 +00:00
unaligned.ll
[PowerPC] Remove the match pattern in the definition of LXSDX/STXSDX
2018-05-24 03:20:28 +00:00
unsafe-math.ll
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unwind-dw2-g.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
unwind-dw2.ll
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uwtables.ll
[Exception Handling] Unwind tables are required for all functions that have an EH personality.
2018-08-24 19:38:29 +00:00
vaddsplat.ll
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varargs-struct-float.ll
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varargs.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
variable_elem_vec_extracts.ll
[SelectionDAG] Reverse the order of operands in the ISD::ADD created by TargetLowering::getVectorElementPointer so that the FrameIndex is on the left.
2017-12-22 17:18:13 +00:00
vcmp-fold.ll
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vec_abs.ll
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vec_absd.ll
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vec_add_sub_doubleword.ll
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vec_add_sub_quadword.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_auto_constant.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
vec_br_cmp.ll
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vec_buildvector_loadstore.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
vec_call.ll
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vec_clz.ll
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vec_cmp.ll
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vec_cmpd.ll
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vec_constants.ll
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vec_conv.ll
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vec_extload.ll
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vec_extract_p9_2.ll
[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.
2018-03-01 22:32:25 +00:00
vec_extract_p9.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_fmuladd.ll
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vec_fneg.ll
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vec_insert.ll
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vec_int_ext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_mergeow.ll
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vec_minmax.ll
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vec_misaligned.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
vec_mul_even_odd.ll
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vec_mul.ll
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vec_perf_shuffle.ll
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vec_popcnt.ll
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vec_revb.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_rotate_shift.ll
NFC - Various typo fixes in tests
2018-07-04 13:28:39 +00:00
vec_rounding.ll
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vec_select.ll
[PowerPC] Revert commit r339779
2018-08-27 13:20:42 +00:00
vec_shift.ll
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vec_shuffle_le.ll
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vec_shuffle_p8vector_le.ll
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vec_shuffle_p8vector.ll
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vec_shuffle.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
vec_sldwi.ll
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vec_splat_constant.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
vec_splat.ll
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vec_sqrt.ll
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vec_urem_const.ll
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vec_veqv_vnand_vorc.ll
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vec_vrsave.ll
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vec_xxpermdi.ll
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vec_zero.ll
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vec-abi-align.ll
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vec-asm-disabled.ll
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vector-identity-shuffle.ll
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vector-merge-store-fp-constants.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
vector.ll
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vperm-instcombine.ll
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vperm-lowering.ll
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vrspill.ll
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vsel-prom.ll
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vselect-constants.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
vsx_insert_extract_le.ll
[PowerPC] Improve codegen for vector loads using scalar_to_vector
2018-08-08 15:20:43 +00:00
vsx_scalar_ld_st.ll
[PowerPC] Add a peephole post RA to transform the inst that fed by add
2018-08-20 02:52:55 +00:00
vsx_shuffle_le.ll
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vsx-args.ll
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VSX-DForm-Scalars.ll
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vsx-div.ll
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vsx-elementary-arith.ll
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vsx-fma-m.ll
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vsx-fma-mutate-trivial-copy.ll
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vsx-fma-mutate-undef.ll
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vsx-fma-sp.ll
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vsx-infl-copy1.ll
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vsx-infl-copy2.ll
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vsx-ldst-builtin-le.ll
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vsx-ldst.ll
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vsx-minmax.ll
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vsx-p8.ll
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vsx-p9.ll
[PowerPC] allow D-form VSX load/store when accessing FrameIndex without offset
2018-04-06 05:41:16 +00:00
vsx-partword-int-loads-and-stores.ll
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vsx-recip-est.ll
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vsx-self-copy.ll
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vsx-spill-norwstore.ll
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vsx-spill.ll
[PowerPC] Emit xscpsgndp instead of xxlor when copying floating point scalar registers for P9
2018-08-24 20:00:24 +00:00
vsx-vec-spill.ll
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vsx-word-splats.ll
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VSX-XForm-Scalars.ll
[PowerPC] Improve codegen for vector loads using scalar_to_vector
2018-08-08 15:20:43 +00:00
vsx.ll
[PowerPC] Revert commit r339779
2018-08-27 13:20:42 +00:00
vsxD-Form-spills.ll
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
2018-07-04 18:54:25 +00:00
vtable-reloc.ll
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weak_def_can_be_hidden.ll
[PPC] Remove Darwin support from POWER backend.
2018-08-28 01:18:29 +00:00
xray-attribute-instrumentation.ll
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xray-conditional-return.ll
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xray-ret-is-terminator.ll
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xray-tail-call-hidden.ll
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xray-tail-call-sled.ll
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xvcmpeqdp-v2f64.ll
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xxleqv_xxlnand_xxlorc.ll
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zero-not-run.ll
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zext-and-cmp.ll
[PowerPC] Relax the checking on AND/AND8 in isSignOrZeroExtended.
2017-11-29 04:09:29 +00:00
zext-bitperm.ll
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zext-free.ll
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