Unlike PPC64, PPC32/SVRV4 does not have red zone. In the absence of it there is no guarantee that this part of the stack will not be modified by any interrupt. To avoid this, make sure to claim the stack frame first before storing into it. This fixes https://llvm.org/bugs/show_bug.cgi?id=26519. Differential Revision: https://reviews.llvm.org/D24093 llvm-svn: 280705
32 lines
1.1 KiB
LLVM
32 lines
1.1 KiB
LLVM
; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -relocation-model=pic | FileCheck -check-prefix=LARGE-BSS %s
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@bar = common global i32 0, align 4
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declare i32 @call_foo(i32, ...)
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define i32 @foo() {
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entry:
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%0 = load i32, i32* @bar, align 4
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%call = call i32 (i32, ...) @call_foo(i32 %0, i32 0, i32 1, i32 2, i32 4, i32 8, i32 16, i32 32, i32 64)
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ret i32 %0
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}
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!llvm.module.flags = !{!0}
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!0 = !{i32 1, !"PIC Level", i32 2}
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; LARGE-BSS: [[POFF:\.L[0-9]+\$poff]]:
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; LARGE-BSS-NEXT: .long .LTOC-[[PB:\.L[0-9]+\$pb]]
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; LARGE-BSS-NEXT: foo:
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; LARGE-BSS: stwu 1, -32(1)
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; LARGE-BSS: stw 30, 24(1)
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; LARGE-BSS: bl [[PB]]
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; LARGE-BSS-NEXT: [[PB]]:
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; LARGE-BSS: mflr 30
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; LARGE-BSS: lwz [[REG:[0-9]+]], [[POFF]]-[[PB]](30)
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; LARGE-BSS-NEXT: add 30, [[REG]], 30
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; LARGE-BSS-DAG: lwz [[VREG:[0-9]+]], [[VREF:\.LC[0-9]+]]-.LTOC(30)
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; LARGE-BSS-DAG: lwz {{[0-9]+}}, 0([[VREG]])
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; LARGE-BSS-DAG: stw {{[0-9]+}}, 8(1)
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; LARGE-BSS: lwz 30, -8(1)
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; LARGE-BSS: [[VREF]]:
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; LARGE-BSS-NEXT: .p2align 2
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; LARGE-BSS-NEXT: .long bar
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