649b7994fb
This is a patch with precommitted tests to make https://github.com/llvm/llvm-project/pull/136630 easier to review. The `virtual-const-prop-small-alignment-*` tests check the output when the loaded int alignment is less than the vtable alignment. This also changes some constants to make it easier to differentiate between propagated values in vtables.
300 lines
10 KiB
LLVM
300 lines
10 KiB
LLVM
; RUN: opt -S -passes=wholeprogramdevirt -whole-program-visibility %s | FileCheck %s
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;; This target uses 32-bit sized and aligned pointers.
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target datalayout = "e-p:32:32"
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;; Constant propagation should be agnostic towards sections.
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;; Also the new global should be in the original vtable's section.
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; CHECK: [[VT1DATA:@[^ ]*]] = {{.*}} { [8 x i8], [3 x ptr], [0 x i8] }
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; CHECK-SAME: [8 x i8] c"\00\00\01\00\00\00\03\00",
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; CHECK-SAME: }, section "vt1sec", !type [[T8:![0-9]+]]
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@vt1 = constant [3 x ptr] [
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ptr @vf0i1,
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ptr @vf1i8,
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ptr @vf1i32
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], section "vt1sec", !type !0
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;; This represents a normal vtable using the default ABI alignments.
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;; For this test, the pointers are 32-bit aligned. The important things
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;; to note are:
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;;
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;; 1. All the constants from the 3rd field propgating an i32 placed at an
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;; offset of -6 from the vtable. Since this vtable is 32-bit aligned
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;; according to the datalayout, this could result in an unaligned load.
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;; 2. The call instruction in @call3 is replaced with a GEP + load.
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;;
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; CHECK: [[VT2DATA:@[^ ]*]] = {{.*}} { [8 x i8], [3 x ptr], [0 x i8] }
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; CHECK-SAME: [8 x i8] c"\00\00\02\00\00\00\02\01",
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; CHECK-SAME: !type [[T8]]
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@vt2 = constant [3 x ptr] [
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ptr @vf1i1,
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ptr @vf0i8,
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ptr @vf2i32
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], !type !0
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;; This represents an underaligned vtable.
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;;
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;; All the functions returning i8s and i1s should still be constant-propagated
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;; because we can still do an aligned load regardless of where the 1-byte aligned
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;; vtable is.
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; CHECK: [[VT3DATA:@[^ ]*]] = {{.*}} { [6 x i8], [3 x ptr], [0 x i8] }
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; CHECK-SAME: [6 x i8] c"\03\00\00\00\03\00",
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; CHECK-SAME: }, align 1, !type [[T5:![0-9]+]]
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@vt3 = constant [3 x ptr] [
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ptr @vf0i1,
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ptr @vf1i8,
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ptr @vf3i32
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], align 1, !type !0
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;; This represents an overaligned vtable.
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; CHECK: [[VT4DATA:@[^ ]*]] = {{.*}} { [16 x i8], [3 x ptr], [0 x i8] }
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; CHECK-SAME: [16 x i8] c"\00\00\00\00\00\00\00\00\00\00\04\00\00\00\02\01",
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; CHECK-SAME: }, align 16, !type [[T16:![0-9]+]]
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@vt4 = constant [3 x ptr] [
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ptr @vf1i1,
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ptr @vf0i8,
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ptr @vf4i32
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], align 16, !type !0
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;; These contain a mix of different integral type sizes.
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; CHECK: [[VT6DATA:@[^ ]*]] = {{.*}} { [12 x i8], [3 x ptr], [0 x i8] }
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; CHECK-SAME: [12 x i8] c"\00\00\00\0B\05\00\00\00\00\00\00\00",
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; CHECK-SAME: }, !type [[T1:![0-9]+]]
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@vt6 = constant [3 x ptr] [
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ptr @vf0i1,
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ptr @vf10i8,
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ptr @vf5i64
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], !type !1
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; CHECK: [[VT7DATA:@[^ ]*]] = {{.*}} { [12 x i8], [3 x ptr], [0 x i8] }
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; CHECK-SAME: [12 x i8] c"\00\00\00\0A\06\00\00\00\00\00\00\00",
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; CHECK-SAME: }, !type [[T1]]
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@vt7 = constant [3 x ptr] [
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ptr @vf1i1,
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ptr @vf9i8,
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ptr @vf6i64
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], !type !1
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;; Test relative vtables
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; CHECK: [[VT6RELDATA:@[^ ]*]] = {{.*}} { [12 x i8], [3 x i32], [0 x i8] }
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; CHECK-SAME: [12 x i8] c"\00\00\00\0B\05\00\00\00\00\00\00\00",
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; CHECK-SAME: ], [0 x i8] zeroinitializer }, !type [[TREL:![0-9]+]]
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@vt6_rel = constant [3 x i32] [
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i32 trunc (i64 sub (i64 ptrtoint (ptr dso_local_equivalent @vf0i1 to i64), i64 ptrtoint (ptr @vt6_rel to i64)) to i32),
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i32 trunc (i64 sub (i64 ptrtoint (ptr dso_local_equivalent @vf10i8 to i64), i64 ptrtoint (ptr @vt6_rel to i64)) to i32),
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i32 trunc (i64 sub (i64 ptrtoint (ptr dso_local_equivalent @vf5i64 to i64), i64 ptrtoint (ptr @vt6_rel to i64)) to i32)
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], !type !2
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; CHECK: [[VT7RELDATA:@[^ ]*]] = {{.*}} { [12 x i8], [3 x i32], [0 x i8] }
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; CHECK-SAME: [12 x i8] c"\00\00\00\0A\06\00\00\00\00\00\00\00",
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; CHECK-SAME: ], [0 x i8] zeroinitializer }, !type [[TREL]]
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@vt7_rel = constant [3 x i32] [
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i32 trunc (i64 sub (i64 ptrtoint (ptr dso_local_equivalent @vf1i1 to i64), i64 ptrtoint (ptr @vt7_rel to i64)) to i32),
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i32 trunc (i64 sub (i64 ptrtoint (ptr dso_local_equivalent @vf9i8 to i64), i64 ptrtoint (ptr @vt7_rel to i64)) to i32),
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i32 trunc (i64 sub (i64 ptrtoint (ptr dso_local_equivalent @vf6i64 to i64), i64 ptrtoint (ptr @vt7_rel to i64)) to i32)
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], !type !2
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; CHECK: @vt1 = alias [3 x ptr], getelementptr inbounds ({ [8 x i8], [3 x ptr], [0 x i8] }, ptr [[VT1DATA]], i32 0, i32 1)
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; CHECK: @vt2 = alias [3 x ptr], getelementptr inbounds ({ [8 x i8], [3 x ptr], [0 x i8] }, ptr [[VT2DATA]], i32 0, i32 1)
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; CHECK: @vt3 = alias [3 x ptr], getelementptr inbounds ({ [6 x i8], [3 x ptr], [0 x i8] }, ptr [[VT3DATA]], i32 0, i32 1)
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; CHECK: @vt4 = alias [3 x ptr], getelementptr inbounds ({ [16 x i8], [3 x ptr], [0 x i8] }, ptr [[VT4DATA]], i32 0, i32 1)
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; CHECK: @vt6 = alias [3 x ptr], getelementptr inbounds ({ [12 x i8], [3 x ptr], [0 x i8] }, ptr [[VT6DATA]], i32 0, i32 1)
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; CHECK: @vt7 = alias [3 x ptr], getelementptr inbounds ({ [12 x i8], [3 x ptr], [0 x i8] }, ptr [[VT7DATA]], i32 0, i32 1)
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; CHECK: @vt6_rel = alias [3 x i32], getelementptr inbounds ({ [12 x i8], [3 x i32], [0 x i8] }, ptr [[VT6RELDATA]], i32 0, i32 1)
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; CHECK: @vt7_rel = alias [3 x i32], getelementptr inbounds ({ [12 x i8], [3 x i32], [0 x i8] }, ptr [[VT7RELDATA]], i32 0, i32 1)
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define i1 @vf0i1(ptr %this) readnone {
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ret i1 0
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}
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define i1 @vf1i1(ptr %this) readnone {
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ret i1 1
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}
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define i8 @vf0i8(ptr %this) readnone {
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ret i8 2
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}
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define i8 @vf1i8(ptr %this) readnone {
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ret i8 3
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}
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define i32 @vf1i32(ptr %this) readnone {
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ret i32 1
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}
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define i32 @vf2i32(ptr %this) readnone {
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ret i32 2
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}
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define i32 @vf3i32(ptr %this) readnone {
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ret i32 3
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}
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define i32 @vf4i32(ptr %this) readnone {
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ret i32 4
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}
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define i64 @vf5i64(ptr %this) readnone {
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ret i64 5
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}
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define i64 @vf6i64(ptr %this) readnone {
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ret i64 6
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}
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define i16 @vf7i16(ptr %this) readnone {
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ret i16 7
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}
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define i16 @vf8i16(ptr %this) readnone {
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ret i16 8
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}
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define i8 @vf9i8(ptr %this) readnone {
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ret i8 10
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}
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define i8 @vf10i8(ptr %this) readnone {
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ret i8 11
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}
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; CHECK-LABEL: define i1 @call1(
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define i1 @call1(ptr %obj) {
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%vtable = load ptr, ptr %obj
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%p = call i1 @llvm.type.test(ptr %vtable, metadata !"typeid")
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call void @llvm.assume(i1 %p)
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%fptr = load ptr, ptr %vtable
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; CHECK: [[VTGEP1:%[^ ]*]] = getelementptr i8, ptr %vtable, i32 -1
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; CHECK: [[VTLOAD1:%[^ ]*]] = load i8, ptr [[VTGEP1]]
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; CHECK: [[VTAND1:%[^ ]*]] = and i8 [[VTLOAD1]], 1
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; CHECK: [[VTCMP1:%[^ ]*]] = icmp ne i8 [[VTAND1]], 0
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%result = call i1 %fptr(ptr %obj)
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; CHECK: ret i1 [[VTCMP1]]
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ret i1 %result
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}
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; CHECK-LABEL: define i8 @call2(
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define i8 @call2(ptr %obj) {
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%vtable = load ptr, ptr %obj
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%p = call i1 @llvm.type.test(ptr %vtable, metadata !"typeid")
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call void @llvm.assume(i1 %p)
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%fptrptr = getelementptr [3 x ptr], ptr %vtable, i32 0, i32 1
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%fptr = load ptr, ptr %fptrptr
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%result = call i8 %fptr(ptr %obj)
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ret i8 %result
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; CHECK: [[VTGEP2:%[^ ]*]] = getelementptr i8, ptr %vtable, i32 -2
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; CHECK: [[VTLOAD:%[^ ]*]] = load i8, ptr [[VTGEP2]]
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; CHECK: ret i8 [[VTLOAD]]
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}
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;; We never constant propagate this since the i32 cannot be reliably loaded
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;; without misalignment from all "typeid" vtables (due to the `align 1` vtable).
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; CHECK-LABEL: define i32 @call3(
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define i32 @call3(ptr %obj) {
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%vtable = load ptr, ptr %obj
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%p = call i1 @llvm.type.test(ptr %vtable, metadata !"typeid")
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call void @llvm.assume(i1 %p)
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%fptrptr = getelementptr [3 x ptr], ptr %vtable, i32 0, i32 2
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%fptr = load ptr, ptr %fptrptr
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%result = call i32 %fptr(ptr %obj)
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ret i32 %result
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; CHECK: [[VTGEP2:%[^ ]*]] = getelementptr i8, ptr %vtable, i32 -6
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; CHECK: [[VTLOAD:%[^ ]*]] = load i32, ptr [[VTGEP2]]
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; CHECK: ret i32 [[VTLOAD]]
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}
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; CHECK-LABEL: define i1 @call4(
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define i1 @call4(ptr %obj) {
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%vtable = load ptr, ptr %obj
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%p = call i1 @llvm.type.test(ptr %vtable, metadata !"typeid2")
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call void @llvm.assume(i1 %p)
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%fptrptr = getelementptr [3 x ptr], ptr %vtable, i32 0, i32 0
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%fptr = load ptr, ptr %fptrptr
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%result = call i1 %fptr(ptr %obj)
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ret i1 %result
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; CHECK: [[RES:%[^ ]*]] = icmp eq ptr %vtable, @vt7
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; CHECK: ret i1 [[RES]]
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}
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; CHECK-LABEL: define i64 @call5(
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define i64 @call5(ptr %obj) {
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%vtable = load ptr, ptr %obj
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%p = call i1 @llvm.type.test(ptr %vtable, metadata !"typeid2")
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call void @llvm.assume(i1 %p)
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%fptrptr = getelementptr [3 x ptr], ptr %vtable, i32 0, i32 2
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%fptr = load ptr, ptr %fptrptr
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%result = call i64 %fptr(ptr %obj)
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ret i64 %result
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; CHECK: [[VTGEP2:%[^ ]*]] = getelementptr i8, ptr %vtable, i32 -8
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; CHECK: [[VTLOAD:%[^ ]*]] = load i64, ptr [[VTGEP2]]
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; CHECK: ret i64 [[VTLOAD]]
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}
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; CHECK-LABEL: define i8 @call6(
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define i8 @call6(ptr %obj) {
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%vtable = load ptr, ptr %obj
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%p = call i1 @llvm.type.test(ptr %vtable, metadata !"typeid2")
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call void @llvm.assume(i1 %p)
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%fptrptr = getelementptr [3 x ptr], ptr %vtable, i32 0, i32 1
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%fptr = load ptr, ptr %fptrptr
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%result = call i8 %fptr(ptr %obj)
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ret i8 %result
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; CHECK: [[VTGEP2:%[^ ]*]] = getelementptr i8, ptr %vtable, i32 -9
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; CHECK: [[VTLOAD:%[^ ]*]] = load i8, ptr [[VTGEP2]]
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; CHECK: ret i8 [[VTLOAD]]
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}
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; CHECK-LABEL: define i1 @call4_rel(
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define i1 @call4_rel(ptr %obj) {
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%vtable = load ptr, ptr %obj
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%p = call i1 @llvm.type.test(ptr %vtable, metadata !"typeid3")
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call void @llvm.assume(i1 %p)
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%fptr = call ptr @llvm.load.relative.i32(ptr %vtable, i32 0)
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%result = call i1 %fptr(ptr %obj)
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ret i1 %result
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; CHECK: [[RES:%[^ ]*]] = icmp eq ptr %vtable, @vt7_rel
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; CHECK: ret i1 [[RES]]
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}
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; CHECK-LABEL: define i64 @call5_rel(
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define i64 @call5_rel(ptr %obj) {
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%vtable = load ptr, ptr %obj
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%p = call i1 @llvm.type.test(ptr %vtable, metadata !"typeid3")
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call void @llvm.assume(i1 %p)
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%fptr = call ptr @llvm.load.relative.i32(ptr %vtable, i32 8)
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%result = call i64 %fptr(ptr %obj)
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ret i64 %result
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; CHECK: [[VTGEP2:%[^ ]*]] = getelementptr i8, ptr %vtable, i32 -8
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; CHECK: [[VTLOAD:%[^ ]*]] = load i64, ptr [[VTGEP2]]
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; CHECK: ret i64 [[VTLOAD]]
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}
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; CHECK-LABEL: define i8 @call6_rel(
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define i8 @call6_rel(ptr %obj) {
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%vtable = load ptr, ptr %obj
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%p = call i1 @llvm.type.test(ptr %vtable, metadata !"typeid3")
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call void @llvm.assume(i1 %p)
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%fptr = call ptr @llvm.load.relative.i32(ptr %vtable, i32 4)
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%result = call i8 %fptr(ptr %obj)
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ret i8 %result
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; CHECK: [[VTGEP2:%[^ ]*]] = getelementptr i8, ptr %vtable, i32 -9
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; CHECK: [[VTLOAD:%[^ ]*]] = load i8, ptr [[VTGEP2]]
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; CHECK: ret i8 [[VTLOAD]]
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}
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declare i1 @llvm.type.test(ptr, metadata)
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declare void @llvm.assume(i1)
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declare void @__cxa_pure_virtual()
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declare ptr @llvm.load.relative.i32(ptr, i32)
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; CHECK: [[T8]] = !{i32 8, !"typeid"}
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; CHECK: [[T5]] = !{i32 6, !"typeid"}
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; CHECK: [[T16]] = !{i32 16, !"typeid"}
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; CHECK: [[T1]] = !{i32 12, !"typeid2"}
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; CHECK: [[TREL]] = !{i32 12, !"typeid3"}
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!0 = !{i32 0, !"typeid"}
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!1 = !{i32 0, !"typeid2"}
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!2 = !{i32 0, !"typeid3"}
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