96a14f388b
As reported on https://reviews.llvm.org/D150375#4367861 and following, this change causes PDT invalidation issues. Revert it and dependent commits. This reverts commit0524534d52. This reverts commitced90d1ff6. This reverts commit9f992cc935. This reverts commit1b1232047e.
90 lines
3.4 KiB
LLVM
90 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes="ipsccp<func-spec>,deadargelim" -force-specialization -S < %s | FileCheck %s
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; RUN: opt -passes="ipsccp<func-spec>,deadargelim" -funcspec-max-iters=1 -force-specialization -S < %s | FileCheck %s
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; RUN: opt -passes="ipsccp<func-spec>,deadargelim" -funcspec-max-iters=0 -force-specialization -S < %s | FileCheck %s --check-prefix=DISABLED
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; RUN: opt -passes="ipsccp<func-spec>,deadargelim" -funcspec-avg-loop-iters=1 -force-specialization -S < %s | FileCheck %s
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; DISABLED-NOT: @func.1(
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; DISABLED-NOT: @func.2(
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define internal i32 @func(ptr %0, i32 %1, ptr nocapture %2) {
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%4 = alloca i32, align 4
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store i32 %1, ptr %4, align 4
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%5 = load i32, ptr %4, align 4
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%6 = icmp slt i32 %5, 1
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br i1 %6, label %14, label %7
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7: ; preds = %3
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%8 = load i32, ptr %4, align 4
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%9 = sext i32 %8 to i64
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%10 = getelementptr inbounds i32, ptr %0, i64 %9
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call void %2(ptr %10)
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%11 = load i32, ptr %4, align 4
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%12 = add nsw i32 %11, -1
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%13 = call i32 @func(ptr %0, i32 %12, ptr %2)
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br label %14
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14: ; preds = %3, %7
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ret i32 0
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}
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define internal void @increment(ptr nocapture %0) {
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%2 = load i32, ptr %0, align 4
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%3 = add nsw i32 %2, 1
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store i32 %3, ptr %0, align 4
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ret void
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}
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define internal void @decrement(ptr nocapture %0) {
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%2 = load i32, ptr %0, align 4
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%3 = add nsw i32 %2, -1
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store i32 %3, ptr %0, align 4
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ret void
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}
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define i32 @main(ptr %0, i32 %1) {
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; CHECK: call void @func.2(ptr [[TMP0:%.*]], i32 [[TMP1:%.*]])
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%3 = call i32 @func(ptr %0, i32 %1, ptr nonnull @increment)
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; CHECK: call void @func.1(ptr [[TMP0]], i32 0)
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%4 = call i32 @func(ptr %0, i32 %3, ptr nonnull @decrement)
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; CHECK: ret i32 0
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ret i32 %4
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}
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; CHECK: @func.1(
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; CHECK: [[TMP3:%.*]] = alloca i32, align 4
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; CHECK: store i32 [[TMP1:%.*]], ptr [[TMP3]], align 4
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; CHECK: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
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; CHECK: [[TMP5:%.*]] = icmp slt i32 [[TMP4]], 1
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; CHECK: br i1 [[TMP5]], label [[TMP13:%.*]], label [[TMP6:%.*]]
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; CHECK: 6:
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; CHECK: [[TMP7:%.*]] = load i32, ptr [[TMP3]], align 4
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; CHECK: [[TMP8:%.*]] = sext i32 [[TMP7]] to i64
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; CHECK: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP0:%.*]], i64 [[TMP8]]
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; CHECK: call void @decrement(ptr [[TMP9]])
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; CHECK: [[TMP10:%.*]] = load i32, ptr [[TMP3]], align 4
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; CHECK: [[TMP11:%.*]] = add nsw i32 [[TMP10]], -1
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; CHECK: call void @func.1(ptr [[TMP0]], i32 [[TMP11]])
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; CHECK: br label [[TMP12:%.*]]
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; CHECK: 12:
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; CHECK: ret void
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;
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;
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; CHECK: @func.2(
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; CHECK: [[TMP3:%.*]] = alloca i32, align 4
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; CHECK: store i32 [[TMP1:%.*]], ptr [[TMP3]], align 4
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; CHECK: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
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; CHECK: [[TMP5:%.*]] = icmp slt i32 [[TMP4]], 1
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; CHECK: br i1 [[TMP5]], label [[TMP13:%.*]], label [[TMP6:%.*]]
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; CHECK: 6:
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; CHECK: [[TMP7:%.*]] = load i32, ptr [[TMP3]], align 4
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; CHECK: [[TMP8:%.*]] = sext i32 [[TMP7]] to i64
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; CHECK: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP0:%.*]], i64 [[TMP8]]
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; CHECK: call void @increment(ptr [[TMP9]])
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; CHECK: [[TMP10:%.*]] = load i32, ptr [[TMP3]], align 4
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; CHECK: [[TMP11:%.*]] = add nsw i32 [[TMP10]], -1
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; CHECK: call void @func.2(ptr [[TMP0]], i32 [[TMP11]])
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; CHECK: br label [[TMP12:%.*]]
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; CHECK: 12:
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; CHECK: ret void
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