9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
116 lines
4.5 KiB
LLVM
116 lines
4.5 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN %s
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; RUN: not llc -mtriple=amdgcn -mcpu=bonaire -verify-machineinstrs < %s 2>&1 | FileCheck -enable-var-scope -check-prefixes=INVALID %s
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; RUN: not llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck -enable-var-scope -check-prefixes=INVALID %s
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; GCN-LABEL: {{^}}s_input_output_v8f16
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; GCN: s_mov_b32 s[0:3], -1
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; GCN: ; use s[0:3]
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; INVALID: error: couldn't allocate output register for constraint 's'
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; INVALID: error: couldn't allocate input reg for constraint 's'
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define amdgpu_kernel void @s_input_output_v8f16() {
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%v = tail call <8 x half> asm sideeffect "s_mov_b32 $0, -1", "=s"()
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tail call void asm sideeffect "; use $0", "s"(<8 x half> %v)
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ret void
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}
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; GCN-LABEL: {{^}}s_input_output_v8i16
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; GCN: s_mov_b32 s[0:3], -1
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; GCN: ; use s[0:3]
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; INVALID: error: couldn't allocate output register for constraint 's'
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; INVALID: error: couldn't allocate input reg for constraint 's'
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define amdgpu_kernel void @s_input_output_v8i16() {
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%v = tail call <8 x i16> asm sideeffect "s_mov_b32 $0, -1", "=s"()
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tail call void asm sideeffect "; use $0", "s"(<8 x i16> %v)
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ret void
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}
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; GCN-LABEL: {{^}}v_input_output_v8f16
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; GCN: v_mov_b32 v[0:3], -1
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; GCN: ; use v[0:3]
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; INVALID: error: couldn't allocate output register for constraint 'v'
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; INVALID: error: couldn't allocate input reg for constraint 'v'
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define amdgpu_kernel void @v_input_output_v8f16() {
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%v = tail call <8 x half> asm sideeffect "v_mov_b32 $0, -1", "=v"()
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tail call void asm sideeffect "; use $0", "v"(<8 x half> %v)
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ret void
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}
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; GCN-LABEL: {{^}}v_input_output_v8i16
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; GCN: v_mov_b32 v[0:3], -1
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; GCN: ; use v[0:3]
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; INVALID: error: couldn't allocate output register for constraint 'v'
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; INVALID: error: couldn't allocate input reg for constraint 'v'
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define amdgpu_kernel void @v_input_output_v8i16() {
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%v = tail call <8 x i16> asm sideeffect "v_mov_b32 $0, -1", "=v"()
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tail call void asm sideeffect "; use $0", "v"(<8 x i16> %v)
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ret void
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}
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; GCN-LABEL: {{^}}s_input_output_v16f16
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; GCN: s_mov_b32 s[0:7], -1
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; GCN: ; use s[0:7]
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; INVALID: error: couldn't allocate output register for constraint 's'
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; INVALID: error: couldn't allocate input reg for constraint 's'
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define amdgpu_kernel void @s_input_output_v16f16() {
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%v = tail call <16 x half> asm sideeffect "s_mov_b32 $0, -1", "=s"()
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tail call void asm sideeffect "; use $0", "s"(<16 x half> %v)
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ret void
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}
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; GCN-LABEL: {{^}}s_input_output_v16i16
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; GCN: s_mov_b32 s[0:7], -1
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; GCN: ; use s[0:7]
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; INVALID: error: couldn't allocate output register for constraint 's'
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; INVALID: error: couldn't allocate input reg for constraint 's'
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define amdgpu_kernel void @s_input_output_v16i16() {
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%v = tail call <16 x i16> asm sideeffect "s_mov_b32 $0, -1", "=s"()
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tail call void asm sideeffect "; use $0", "s"(<16 x i16> %v)
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ret void
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}
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; GCN-LABEL: {{^}}v_input_output_v16f16
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; GCN: v_mov_b32 v[0:7], -1
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; GCN: ; use v[0:7]
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; INVALID: error: couldn't allocate output register for constraint 'v'
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; INVALID: error: couldn't allocate input reg for constraint 'v'
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define amdgpu_kernel void @v_input_output_v16f16() {
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%v = tail call <16 x half> asm sideeffect "v_mov_b32 $0, -1", "=v"()
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tail call void asm sideeffect "; use $0", "v"(<16 x half> %v)
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ret void
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}
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; GCN-LABEL: {{^}}v_input_output_v16i16
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; GCN: v_mov_b32 v[0:7], -1
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; GCN: ; use v[0:7]
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; INVALID: error: couldn't allocate output register for constraint 'v'
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; INVALID: error: couldn't allocate input reg for constraint 'v'
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define amdgpu_kernel void @v_input_output_v16i16() {
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%v = tail call <16 x i16> asm sideeffect "v_mov_b32 $0, -1", "=v"()
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tail call void asm sideeffect "; use $0", "v"(<16 x i16> %v)
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ret void
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}
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; GCN-LABEL: {{^}}v_input_output_v32f16
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; GCN: v_mov_b32 v[0:15], -1
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; GCN: ; use v[0:15]
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; INVALID: error: couldn't allocate output register for constraint 'v'
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; INVALID: error: couldn't allocate input reg for constraint 'v'
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define amdgpu_kernel void @v_input_output_v32f16() {
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%v = tail call <32 x half> asm sideeffect "v_mov_b32 $0, -1", "=v"()
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tail call void asm sideeffect "; use $0", "v"(<32 x half> %v)
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ret void
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}
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; GCN-LABEL: {{^}}v_input_output_v32i16
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; GCN: v_mov_b32 v[0:15], -1
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; GCN: ; use v[0:15]
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; INVALID: error: couldn't allocate output register for constraint 'v'
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; INVALID: error: couldn't allocate input reg for constraint 'v'
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define amdgpu_kernel void @v_input_output_v32i16() {
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%v = tail call <32 x i16> asm sideeffect "v_mov_b32 $0, -1", "=v"()
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tail call void asm sideeffect "; use $0", "v"(<32 x i16> %v)
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ret void
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}
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attributes #0 = { nounwind }
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