9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
47 lines
1.4 KiB
LLVM
47 lines
1.4 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}rint_f64:
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; CI: v_rndne_f64_e32
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; SI-DAG: v_add_f64
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; SI-DAG: v_add_f64
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; SI-DAG: v_cmp_gt_f64_e64
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; SI: v_cndmask_b32
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; SI: v_cndmask_b32
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; SI: s_endpgm
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define amdgpu_kernel void @rint_f64(ptr addrspace(1) %out, double %in) {
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entry:
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%0 = call double @llvm.rint.f64(double %in)
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store double %0, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}rint_v2f64:
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; CI: v_rndne_f64_e32
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; CI: v_rndne_f64_e32
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define amdgpu_kernel void @rint_v2f64(ptr addrspace(1) %out, <2 x double> %in) {
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entry:
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%0 = call <2 x double> @llvm.rint.v2f64(<2 x double> %in)
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store <2 x double> %0, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}rint_v4f64:
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; CI: v_rndne_f64_e32
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; CI: v_rndne_f64_e32
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; CI: v_rndne_f64_e32
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; CI: v_rndne_f64_e32
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define amdgpu_kernel void @rint_v4f64(ptr addrspace(1) %out, <4 x double> %in) {
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entry:
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%0 = call <4 x double> @llvm.rint.v4f64(<4 x double> %in)
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store <4 x double> %0, ptr addrspace(1) %out
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ret void
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}
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declare double @llvm.rint.f64(double) #0
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declare <2 x double> @llvm.rint.v2f64(<2 x double>) #0
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declare <4 x double> @llvm.rint.v4f64(<4 x double>) #0
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