9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
31 lines
933 B
LLVM
31 lines
933 B
LLVM
; RUN: llc -mtriple=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
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; EG-LABEL: {{^}}and_setcc_setcc_i32:
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; EG: AND_INT
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; EG-NEXT: SETE_INT
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define amdgpu_kernel void @and_setcc_setcc_i32(ptr addrspace(1) %out, i32 %a, i32 %b) {
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%cmp1 = icmp eq i32 %a, -1
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%cmp2 = icmp eq i32 %b, -1
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%and = and i1 %cmp1, %cmp2
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%ext = sext i1 %and to i32
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store i32 %ext, ptr addrspace(1) %out, align 4
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ret void
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}
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; EG-LABEL: {{^}}and_setcc_setcc_v4i32:
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; EG: AND_INT
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; EG: AND_INT
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; EG: SETE_INT
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; EG: AND_INT
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; EG: SETE_INT
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; EG: AND_INT
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; EG: SETE_INT
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define amdgpu_kernel void @and_setcc_setcc_v4i32(ptr addrspace(1) %out, <4 x i32> %a, <4 x i32> %b) {
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%cmp1 = icmp eq <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>
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%cmp2 = icmp eq <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
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%and = and <4 x i1> %cmp1, %cmp2
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%ext = sext <4 x i1> %and to <4 x i32>
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store <4 x i32> %ext, ptr addrspace(1) %out, align 4
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ret void
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}
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