Matt Arsenault 36919a4f7c Move AArch64BranchRelaxation to generic code ...

llvm-svn: 283459

2016-10-06 15:38:53 +00:00

..

AArch64

Move AArch64BranchRelaxation to generic code

2016-10-06 15:38:53 +00:00

AMDGPU

AMDGPU: Partially fix control flow at -O0

2016-09-29 01:44:16 +00:00

ARM

MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it

2016-08-25 01:27:13 +00:00

Generic

MIRParser/MIRPrinter: Compute HasInlineAsm instead of printing/parsing it

2016-08-24 22:34:06 +00:00

Hexagon

MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it

2016-08-25 01:27:13 +00:00

Lanai

MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it

2016-08-25 01:27:13 +00:00

Mips

MIRParser: Use shorter cfi identifiers

2016-07-26 18:20:00 +00:00

NVPTX

llc: Add support for -run-pass none

2016-07-16 02:24:59 +00:00

PowerPC

MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.

2016-08-24 01:32:41 +00:00

X86

GlobalISel: disambiguate types when printing MIR

2016-09-12 11:20:10 +00:00