f2968d58cb
This adds support for the new 128-bit vector float instructions of z14. Note that these instructions actually only operate on the f128 type, since only each 128-bit vector register can hold only one 128-bit float value. However, this is still preferable to the legacy 128-bit float instructions, since those operate on pairs of floating-point registers (so we can hold at most 8 values in registers), while the new instructions use single vector registers (so we hold up to 32 value in registers). Adding support includes: - Enabling the instructions for the assembler/disassembler. - CodeGen for the instructions. This includes allocating the f128 type now to the VR128BitRegClass instead of FP128BitRegClass. - Scheduler description support for the instructions. Note that for a small number of operations, we have no new vector instructions (like integer <-> 128-bit float conversions), and so we use the legacy instruction and then reformat the operand (i.e. copy between a pair of floating-point registers and a vector register). llvm-svn: 308196
82 lines
2.4 KiB
LLVM
82 lines
2.4 KiB
LLVM
; Test f128 copysign operations on z14.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
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declare float @copysignf(float, float) readnone
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declare double @copysign(double, double) readnone
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; FIXME: not really the correct prototype for SystemZ.
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declare fp128 @copysignl(fp128, fp128) readnone
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; Test f32 copies in which the sign comes from an f128.
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define float @f1(float %a, fp128 *%bptr) {
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; CHECK-LABEL: f1:
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; CHECK: vl %v[[REG:[0-9]+]], 0(%r2)
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; CHECK: cpsdr %f0, %f[[REG]], %f0
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; CHECK: br %r14
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%bl = load volatile fp128, fp128 *%bptr
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%b = fptrunc fp128 %bl to float
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%res = call float @copysignf(float %a, float %b) readnone
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ret float %res
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}
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; Test f64 copies in which the sign comes from an f128.
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define double @f2(double %a, fp128 *%bptr) {
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; CHECK-LABEL: f2:
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; CHECK: vl %v[[REG:[0-9]+]], 0(%r2)
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; CHECK: cpsdr %f0, %f[[REG]], %f0
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; CHECK: br %r14
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%bl = load volatile fp128, fp128 *%bptr
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%b = fptrunc fp128 %bl to double
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%res = call double @copysign(double %a, double %b) readnone
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ret double %res
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}
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; Test f128 copies in which the sign comes from an f32.
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define void @f7(fp128 *%cptr, fp128 *%aptr, float %bf) {
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; CHECK-LABEL: f7:
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; CHECK: vl [[REG1:%v[0-7]+]], 0(%r3)
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; CHECK: tmlh
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; CHECK: wflnxb [[REG1]], [[REG1]]
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; CHECK: wflpxb [[REG1]], [[REG1]]
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; CHECK: vst [[REG1]], 0(%r2)
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; CHECK: br %r14
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%a = load volatile fp128, fp128 *%aptr
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%b = fpext float %bf to fp128
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%c = call fp128 @copysignl(fp128 %a, fp128 %b) readnone
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store fp128 %c, fp128 *%cptr
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ret void
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}
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; As above, but the sign comes from an f64.
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define void @f8(fp128 *%cptr, fp128 *%aptr, double %bd) {
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; CHECK-LABEL: f8:
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; CHECK: vl [[REG1:%v[0-7]+]], 0(%r3)
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; CHECK: tmhh
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; CHECK: wflnxb [[REG1]], [[REG1]]
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; CHECK: wflpxb [[REG1]], [[REG1]]
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; CHECK: vst [[REG1]], 0(%r2)
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; CHECK: br %r14
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%a = load volatile fp128, fp128 *%aptr
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%b = fpext double %bd to fp128
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%c = call fp128 @copysignl(fp128 %a, fp128 %b) readnone
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store fp128 %c, fp128 *%cptr
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ret void
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}
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; As above, but the sign comes from an f128.
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define void @f9(fp128 *%cptr, fp128 *%aptr, fp128 *%bptr) {
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; CHECK-LABEL: f9:
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; CHECK: vl [[REG1:%v[0-7]+]], 0(%r3)
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; CHECK: vl [[REG2:%v[0-7]+]], 0(%r4)
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; CHECK: tm
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; CHECK: wflnxb [[REG1]], [[REG1]]
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; CHECK: wflpxb [[REG1]], [[REG1]]
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; CHECK: vst [[REG1]], 0(%r2)
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; CHECK: br %r14
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%a = load volatile fp128, fp128 *%aptr
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%b = load volatile fp128, fp128 *%bptr
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%c = call fp128 @copysignl(fp128 %a, fp128 %b) readnone
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store fp128 %c, fp128 *%cptr
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ret void
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}
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