80aca1eaf7
This revision removes all of the CRTP from the pass hierarchy in preparation for using the tablegen backend instead. This creates a much cleaner interface in the C++ code, and naturally fits with the rest of the infrastructure. A new utility class, PassWrapper, is added to replicate the existing behavior for passes not suitable for using the tablegen backend. Differential Revision: https://reviews.llvm.org/D77350
61 lines
2.0 KiB
C++
61 lines
2.0 KiB
C++
//===- TestLoopMapping.cpp --- Parametric loop mapping pass ---------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a pass to parametrically map loop.for loops to virtual
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// processing element dimensions.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/LoopOps/LoopOps.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/Pass/Pass.h"
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#include "mlir/Transforms/LoopUtils.h"
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#include "mlir/Transforms/Passes.h"
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#include "llvm/ADT/SetVector.h"
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using namespace mlir;
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namespace {
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class TestLoopMappingPass
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: public PassWrapper<TestLoopMappingPass, FunctionPass> {
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public:
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explicit TestLoopMappingPass() {}
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void runOnFunction() override {
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FuncOp func = getFunction();
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// SSA values for the transformation are created out of thin air by
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// unregistered "new_processor_id_and_range" operations. This is enough to
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// emulate mapping conditions.
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SmallVector<Value, 8> processorIds, numProcessors;
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func.walk([&processorIds, &numProcessors](Operation *op) {
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if (op->getName().getStringRef() != "new_processor_id_and_range")
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return;
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processorIds.push_back(op->getResult(0));
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numProcessors.push_back(op->getResult(1));
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});
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func.walk([&processorIds, &numProcessors](loop::ForOp op) {
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// Ignore nested loops.
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if (op.getParentRegion()->getParentOfType<loop::ForOp>())
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return;
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mapLoopToProcessorIds(op, processorIds, numProcessors);
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});
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}
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};
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} // end namespace
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namespace mlir {
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void registerTestLoopMappingPass() {
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PassRegistration<TestLoopMappingPass>(
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"test-mapping-to-processing-elements",
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"test mapping a single loop on a virtual processor grid");
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}
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} // namespace mlir
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