David Green 442c351b2b Revert "[AArch64] Generate AND in place of CSEL for predicated CTTZ" ...

This reverts commit 7dcd0ea683 due to
issues reported postcommit with the correctness of truncated cttzs.

2022-05-10 17:17:03 +01:00

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Analysis

[IR][CostModel] A scalable vector shuffle can't be an identity or reverse shuffle.

2022-05-09 21:37:25 -07:00

Assembler

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Bindings

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Bitcode

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BugPoint

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CodeGen

Revert "[AArch64] Generate AND in place of CSEL for predicated CTTZ"

2022-05-10 17:17:03 +01:00

DebugInfo

DWARFVerifier: Verify CU/TU index overlap issues

2022-05-05 18:18:53 +00:00

Demangle

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Examples

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ExecutionEngine

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Feature

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FileCheck

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Instrumentation

[test][msan] Relax order of param shadow

2022-05-07 21:17:44 -07:00

Integer

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JitListener

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Linker

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LTO

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MachineVerifier

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MC

[AMDGPU][GFX10] Support base+soffset+offset SMEM loads.

2022-05-10 16:17:14 +01:00

Object

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ObjectYAML

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Other

[opt] Error on opt -O# --foo-pass

2022-05-09 09:53:24 -07:00

SafepointIRVerifier

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Support

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SymbolRewriter

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TableGen

[NFC][test] Replace hardcoded number with numeric substitution blocks

2022-05-06 08:08:34 +08:00

ThinLTO/X86

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tools

[LLVM][sancov] Inclusive language: Add -ignorelist option

2022-05-09 11:06:08 -04:00

Transforms

[InstCombine] Add additional freeze tests (NFC)

2022-05-10 17:43:48 +02:00

Unit

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Verifier

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YAMLParser

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.clang-format

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CMakeLists.txt

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lit.cfg.py

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lit.site.cfg.py.in

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TestRunner.sh

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