48ebc1af29
The sched_barrier builtin allow the scheduler's behavior to be shaped by users when very specific codegen is needed in order to create highly optimized code. This patch adds more granular control over the types of instructions that are allowed to be reordered with respect to one or multiple sched_barriers. A mask is used to specify groups of instructions that should be allowed to be scheduled around a sched_barrier. The details about this mask may be used can be found in llvm/include/llvm/IR/IntrinsicsAMDGPU.td. Reviewed By: rampitec Differential Revision: https://reviews.llvm.org/D127123
23 lines
764 B
C++
23 lines
764 B
C++
//===- AMDGPUMFMAIGroupLP.h - AMDGPU MFMA IGroupLP --------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H
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#include "llvm/CodeGen/ScheduleDAGMutation.h"
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#include <memory>
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namespace llvm {
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std::unique_ptr<ScheduleDAGMutation> createIGroupLPDAGMutation();
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std::unique_ptr<ScheduleDAGMutation> createSchedBarrierDAGMutation();
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} // namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H
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