Files
clang-p2996/llvm/test/CodeGen/SPIRV/transcoding/ReqdSubgroupSize.ll
Ilia Diachkov df8713079b [SPIRV] support capabilities and extensions
This patch supports SPIR-V capabilities and extensions. In addition,
it inserts decorations related to MIFlags and improves support of switches.
Five tests are included to demonstrate the improvement.

Differential Revision: https://reviews.llvm.org/D131221

Co-authored-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
Co-authored-by: Michal Paszkowski <michal.paszkowski@outlook.com>
Co-authored-by: Andrey Tretyakov <andrey1.tretyakov@intel.com>
Co-authored-by: Konrad Trifunovic <konrad.trifunovic@intel.com>
2022-08-12 23:33:15 +03:00

18 lines
584 B
LLVM

; Check translation of intel_reqd_sub_group_size metadata to SubgroupSize
; execution mode and back. The IR is producded from the following OpenCL C code:
; kernel __attribute__((intel_reqd_sub_group_size(8)))
; void foo() {}
; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
; CHECK-SPIRV: OpCapability SubgroupDispatch
; CHECK-SPIRV: OpEntryPoint Kernel %[[#kernel:]] "foo"
; CHECK-SPIRV: OpExecutionMode %[[#kernel]] SubgroupSize 8
define spir_kernel void @foo() !intel_reqd_sub_group_size !0 {
entry:
ret void
}
!0 = !{i32 8}