084f967370
The result of sign_extend_inreg needs to have as many sign bits as requested by the VT argument. The easiest way to guarantee this is to fold it to 0. SystemZ test was modified to avoid using undef. Fixes https://github.com/llvm/llvm-project/issues/55178 Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D124696
43 lines
1.5 KiB
LLVM
43 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -O3 -pre-RA-sched=list-ilp -systemz-subreg-liveness -stress-sched -terminal-rule %s -o - | FileCheck %s
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; This test used to fail because we were creating empty subranges
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; instead of subranges with dead defs while rematerializing values
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; during coalescing.
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;
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; PR46154
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; REQUIRES: asserts
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@g_39 = external dso_local unnamed_addr global i64, align 8
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@g_151 = external dso_local global i32, align 4
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@g_222 = external dso_local unnamed_addr global [7 x [10 x i8]], align 2
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define void @main(i16 %in) {
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; CHECK-LABEL: main:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lhr %r2, %r2
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; CHECK-NEXT: larl %r1, g_151
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; CHECK-NEXT: lghi %r3, 0
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; CHECK-NEXT: chi %r2, 0
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; CHECK-NEXT: lhi %r0, 1
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; CHECK-NEXT: locghile %r3, 1
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; CHECK-NEXT: o %r0, 0(%r1)
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; CHECK-NEXT: larl %r1, g_222
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; CHECK-NEXT: lghi %r5, 0
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; CHECK-NEXT: dsgfr %r2, %r0
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; CHECK-NEXT: stgrl %r2, g_39
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; CHECK-NEXT: stc %r5, 19(%r1)
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; CHECK-NEXT: br %r14
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%tmp = load i32, i32* @g_151, align 4
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%tmp3 = or i32 %tmp, 1
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%tmp4 = sext i32 %tmp3 to i64
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%tmp5 = srem i64 0, %tmp4
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%tmp6 = trunc i64 %tmp5 to i8
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store i8 %tmp6, i8* getelementptr inbounds ([7 x [10 x i8]], [7 x [10 x i8]]* @g_222, i64 0, i64 1, i64 9), align 1
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%tmp7 = icmp slt i16 %in, 1
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%tmp8 = zext i1 %tmp7 to i64
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%tmp9 = srem i64 %tmp8, %tmp4
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store i64 %tmp9, i64* @g_39, align 8
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ret void
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}
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