af49bed933
After replacing a loop phi with the preheader value, it's usually possible to simplify some of the using instructions, so do that as part of replaceLoopPHINodesWithPreheaderValues(). Doing this as part of IndVars is valuable, because it may make GEPs in the loop have constant offsets and allow the following SROA run to succeed (as demonstrated in the PhaseOrdering test). Differential Revision: https://reviews.llvm.org/D129293
61 lines
1.8 KiB
LLVM
61 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -indvars < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @test() {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: br label [[BB2:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: br label [[BB2]]
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; CHECK: bb2:
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; CHECK-NEXT: [[TMP:%.*]] = phi i32 [ -9, [[BB:%.*]] ], [ -10, [[BB1:%.*]] ]
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; CHECK-NEXT: br label [[BB3:%.*]]
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; CHECK: bb3:
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; CHECK-NEXT: br i1 false, label [[BB5:%.*]], label [[BB12:%.*]]
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; CHECK: bb5:
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; CHECK-NEXT: br i1 undef, label [[BB8:%.*]], label [[BB9:%.*]]
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; CHECK: bb8:
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; CHECK-NEXT: br label [[BB10:%.*]]
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; CHECK: bb9:
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; CHECK-NEXT: br label [[BB10]]
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; CHECK: bb10:
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; CHECK-NEXT: br label [[BB3]]
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; CHECK: bb12:
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; CHECK-NEXT: ret void
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;
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bb:
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br label %bb2
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bb1: ; No predecessors!
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br label %bb2
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bb2: ; preds = %bb1, %bb
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%tmp = phi i32 [ -9, %bb ], [ %tmp6, %bb1 ]
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br label %bb3
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bb3: ; preds = %bb10, %bb2
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%tmp4 = phi i32 [ -9, %bb2 ], [ %tmp6, %bb10 ]
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br i1 undef, label %bb5, label %bb12
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bb5: ; preds = %bb3
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%tmp6 = add i32 %tmp4, -1
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%tmp7 = zext i32 %tmp6 to i64
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br i1 undef, label %bb8, label %bb9
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bb8: ; preds = %bb5
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br label %bb10
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bb9: ; preds = %bb5
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br label %bb10
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bb10: ; preds = %bb9, %bb8
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%tmp11 = and i64 undef, %tmp7
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br label %bb3
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bb12: ; preds = %bb3
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ret void
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}
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