bfb9b8e075
We call tail-call-elim near the beginning of the pipeline, but that is too early to annotate calls that get added later. In the motivating case from issue #47852, the missing 'tail' on memset leads to sub-optimal codegen. I experimented with removing the early instance of tail-call-elim instead of just adding another pass, but that appears to be slightly worse for compile-time: +0.15% vs. +0.08% time. "tailcall" shows adding the pass; "tailcall2" shows moving the pass to later, then adding the original early pass back (so 1596886802 is functionally equivalent to 180b0439dc ): https://llvm-compile-time-tracker.com/index.php?config=NewPM-O3&stat=instructions&remote=rotateright Note that there was an effort to split the tail call functionality into 2 passes - that could help reduce compile-time if we find that this change costs more in compile-time than expected based on the preliminary testing: D60031 Differential Revision: https://reviews.llvm.org/D130374
67 lines
3.0 KiB
LLVM
67 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -O2 < %s | FileCheck %s
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; Test a single-iteration loop that should get SROAd once we realize that fact.
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; It should compile down to a bswap.
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; The helper function exists to avoid IPSCCP breaking the loop too early.
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define i16 @helper(i16 %0, i64 %x) {
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; CHECK-LABEL: @helper(
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; CHECK-NEXT: start:
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; CHECK-NEXT: [[DATA:%.*]] = alloca [2 x i8], align 2
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; CHECK-NEXT: store i16 [[TMP0:%.*]], ptr [[DATA]], align 2
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; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[DATA]], i64 1
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; CHECK-NEXT: br label [[BB6_I_I:%.*]]
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; CHECK: bb6.i.i:
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; CHECK-NEXT: [[ITER_SROA_0_07_I_I:%.*]] = phi i64 [ [[TMP2:%.*]], [[BB6_I_I]] ], [ 0, [[START:%.*]] ]
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; CHECK-NEXT: [[_40_I_I:%.*]] = sub nsw i64 0, [[ITER_SROA_0_07_I_I]]
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; CHECK-NEXT: [[TMP2]] = add nuw nsw i64 [[ITER_SROA_0_07_I_I]], 1
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; CHECK-NEXT: [[_34_I_I:%.*]] = getelementptr inbounds [0 x i8], ptr [[DATA]], i64 0, i64 [[ITER_SROA_0_07_I_I]]
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; CHECK-NEXT: [[_39_I_I:%.*]] = getelementptr inbounds [0 x i8], ptr [[TMP1]], i64 0, i64 [[_40_I_I]]
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; CHECK-NEXT: [[TMP_0_COPYLOAD_I_I_I_I:%.*]] = load i8, ptr [[_34_I_I]], align 1
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; CHECK-NEXT: [[TMP2_0_COPYLOAD_I_I_I_I:%.*]] = load i8, ptr [[_39_I_I]], align 1
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; CHECK-NEXT: store i8 [[TMP2_0_COPYLOAD_I_I_I_I]], ptr [[_34_I_I]], align 1
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; CHECK-NEXT: store i8 [[TMP_0_COPYLOAD_I_I_I_I]], ptr [[_39_I_I]], align 1
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; CHECK-NEXT: [[EXITCOND_NOT_I_I:%.*]] = icmp eq i64 [[TMP2]], [[X:%.*]]
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; CHECK-NEXT: br i1 [[EXITCOND_NOT_I_I]], label [[EXIT:%.*]], label [[BB6_I_I]]
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; CHECK: exit:
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; CHECK-NEXT: [[DOTSROA_0_0_COPYLOAD:%.*]] = load i16, ptr [[DATA]], align 2
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; CHECK-NEXT: ret i16 [[DOTSROA_0_0_COPYLOAD]]
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;
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start:
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%data = alloca [2 x i8], align 2
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store i16 %0, ptr %data, align 2
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%1 = getelementptr inbounds i8, ptr %data, i64 2
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%2 = getelementptr inbounds i8, ptr %1, i64 -1
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br label %bb6.i.i
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bb6.i.i:
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%iter.sroa.0.07.i.i = phi i64 [ %4, %bb6.i.i ], [ 0, %start ]
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%3 = xor i64 %iter.sroa.0.07.i.i, -1
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%_40.i.i = add nsw i64 1, %3
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%4 = add nuw nsw i64 %iter.sroa.0.07.i.i, 1
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%_34.i.i = getelementptr inbounds [0 x i8], ptr %data, i64 0, i64 %iter.sroa.0.07.i.i
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%_39.i.i = getelementptr inbounds [0 x i8], ptr %2, i64 0, i64 %_40.i.i
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%tmp.0.copyload.i.i.i.i = load i8, ptr %_34.i.i, align 1
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%tmp2.0.copyload.i.i.i.i = load i8, ptr %_39.i.i, align 1
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store i8 %tmp2.0.copyload.i.i.i.i, ptr %_34.i.i, align 1
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store i8 %tmp.0.copyload.i.i.i.i, ptr %_39.i.i, align 1
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%exitcond.not.i.i = icmp eq i64 %4, %x
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br i1 %exitcond.not.i.i, label %exit, label %bb6.i.i
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exit:
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%.sroa.0.0.copyload = load i16, ptr %data, align 2
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ret i16 %.sroa.0.0.copyload
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}
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define i16 @test(i16 %arg) {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: bb6.i.i.i:
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; CHECK-NEXT: [[DATA_I_SROA_0_0_INSERT_INSERT:%.*]] = tail call i16 @llvm.bswap.i16(i16 [[ARG:%.*]])
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; CHECK-NEXT: ret i16 [[DATA_I_SROA_0_0_INSERT_INSERT]]
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;
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%ret = call i16 @helper(i16 %arg, i64 1)
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ret i16 %ret
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}
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