12409024d3
Atomic loads are handled differently from the DAG, and have separate opcodes and explicit control over the extensions, like ordinary loads. Add new patterns for these. There's room for cleanup and improvement. d16 cases aren't handled. Fixes #111645
426 lines
16 KiB
TableGen
426 lines
16 KiB
TableGen
//===-- AMDGPUGIsel.td - AMDGPU GlobalISel Patterns---------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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// This files contains patterns that should only be used by GlobalISel. For
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// example patterns for V_* instructions that have S_* equivalents.
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// SelectionDAG does not support selecting V_* instructions.
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//===----------------------------------------------------------------------===//
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include "AMDGPU.td"
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include "AMDGPUCombine.td"
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def sd_vsrc0 : ComplexPattern<i32, 1, "">;
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def gi_vsrc0 :
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GIComplexOperandMatcher<s32, "selectVSRC0">,
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GIComplexPatternEquiv<sd_vsrc0>;
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def sd_vcsrc : ComplexPattern<i32, 1, "">;
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def gi_vcsrc :
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GIComplexOperandMatcher<s32, "selectVCSRC">,
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GIComplexPatternEquiv<sd_vcsrc>;
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def gi_vop3mods0 :
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GIComplexOperandMatcher<s32, "selectVOP3Mods0">,
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GIComplexPatternEquiv<VOP3Mods0>;
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def gi_vop3mods :
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GIComplexOperandMatcher<s32, "selectVOP3Mods">,
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GIComplexPatternEquiv<VOP3Mods>;
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def gi_vop3modsnoncanonicalizing :
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GIComplexOperandMatcher<s32, "selectVOP3ModsNonCanonicalizing">,
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GIComplexPatternEquiv<VOP3ModsNonCanonicalizing>;
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def gi_vop3_no_mods :
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GIComplexOperandMatcher<s32, "selectVOP3NoMods">,
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GIComplexPatternEquiv<VOP3NoMods>;
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def gi_vop3omods :
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GIComplexOperandMatcher<s32, "selectVOP3OMods">,
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GIComplexPatternEquiv<VOP3OMods>;
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def gi_vop3pmods :
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GIComplexOperandMatcher<s32, "selectVOP3PMods">,
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GIComplexPatternEquiv<VOP3PMods>;
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def gi_vop3pmodsdot :
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GIComplexOperandMatcher<s32, "selectVOP3PModsDOT">,
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GIComplexPatternEquiv<VOP3PModsDOT>;
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def gi_vop3pmodsneg :
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GIComplexOperandMatcher<s32, "selectVOP3PModsNeg">,
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GIComplexPatternEquiv<VOP3PModsNeg>;
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def gi_wmmaopselvop3pmods :
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GIComplexOperandMatcher<s32, "selectWMMAOpSelVOP3PMods">,
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GIComplexPatternEquiv<WMMAOpSelVOP3PMods>;
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def gi_wmmavisrc :
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GIComplexOperandMatcher<s32, "selectWMMAVISrc">,
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GIComplexPatternEquiv<WMMAVISrc>;
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def gi_wmmamods :
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GIComplexOperandMatcher<s32, "selectWMMAModsF32NegAbs">,
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GIComplexPatternEquiv<WMMAModsF32NegAbs>;
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def gi_wmmamodsf16Neg :
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GIComplexOperandMatcher<s32, "selectWMMAModsF16Neg">,
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GIComplexPatternEquiv<WMMAModsF16Neg>;
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def gi_wmmamodsf16NegAbs :
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GIComplexOperandMatcher<s32, "selectWMMAModsF16NegAbs">,
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GIComplexPatternEquiv<WMMAModsF16NegAbs>;
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def gi_swmmacindex8 :
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GIComplexOperandMatcher<s32, "selectSWMMACIndex8">,
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GIComplexPatternEquiv<SWMMACIndex8>;
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def gi_swmmacindex16 :
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GIComplexOperandMatcher<s32, "selectSWMMACIndex16">,
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GIComplexPatternEquiv<SWMMACIndex16>;
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def gi_vop3opselmods :
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GIComplexOperandMatcher<s32, "selectVOP3OpSelMods">,
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GIComplexPatternEquiv<VOP3OpSelMods>;
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def gi_vinterpmods :
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GIComplexOperandMatcher<s32, "selectVINTERPMods">,
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GIComplexPatternEquiv<VINTERPMods>;
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def gi_vinterpmods_hi :
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GIComplexOperandMatcher<s32, "selectVINTERPModsHi">,
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GIComplexPatternEquiv<VINTERPModsHi>;
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// FIXME: Why do we have both VOP3OpSel and VOP3OpSelMods?
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def gi_vop3opsel :
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GIComplexOperandMatcher<s32, "selectVOP3OpSelMods">,
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GIComplexPatternEquiv<VOP3OpSel>;
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def gi_smrd_imm :
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GIComplexOperandMatcher<s64, "selectSmrdImm">,
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GIComplexPatternEquiv<SMRDImm>;
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def gi_smrd_imm32 :
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GIComplexOperandMatcher<s64, "selectSmrdImm32">,
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GIComplexPatternEquiv<SMRDImm32>;
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def gi_smrd_sgpr :
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GIComplexOperandMatcher<s64, "selectSmrdSgpr">,
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GIComplexPatternEquiv<SMRDSgpr>;
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def gi_smrd_sgpr_imm :
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GIComplexOperandMatcher<s64, "selectSmrdSgprImm">,
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GIComplexPatternEquiv<SMRDSgprImm>;
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def gi_flat_offset :
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GIComplexOperandMatcher<s64, "selectFlatOffset">,
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GIComplexPatternEquiv<FlatOffset>;
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def gi_global_offset :
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GIComplexOperandMatcher<s64, "selectGlobalOffset">,
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GIComplexPatternEquiv<GlobalOffset>;
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def gi_global_saddr :
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GIComplexOperandMatcher<s64, "selectGlobalSAddr">,
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GIComplexPatternEquiv<GlobalSAddr>;
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def gi_mubuf_scratch_offset :
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GIComplexOperandMatcher<s32, "selectMUBUFScratchOffset">,
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GIComplexPatternEquiv<MUBUFScratchOffset>;
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def gi_buf_soffset :
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GIComplexOperandMatcher<s32, "selectBUFSOffset">,
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GIComplexPatternEquiv<BUFSOffset>;
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def gi_mubuf_scratch_offen :
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GIComplexOperandMatcher<s32, "selectMUBUFScratchOffen">,
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GIComplexPatternEquiv<MUBUFScratchOffen>;
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def gi_flat_scratch_offset :
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GIComplexOperandMatcher<s32, "selectScratchOffset">,
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GIComplexPatternEquiv<ScratchOffset>;
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def gi_flat_scratch_saddr :
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GIComplexOperandMatcher<s32, "selectScratchSAddr">,
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GIComplexPatternEquiv<ScratchSAddr>;
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def gi_flat_scratch_svaddr :
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GIComplexOperandMatcher<s32, "selectScratchSVAddr">,
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GIComplexPatternEquiv<ScratchSVAddr>;
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def gi_ds_1addr_1offset :
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GIComplexOperandMatcher<s32, "selectDS1Addr1Offset">,
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GIComplexPatternEquiv<DS1Addr1Offset>;
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def gi_ds_64bit_4byte_aligned :
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GIComplexOperandMatcher<s64, "selectDS64Bit4ByteAligned">,
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GIComplexPatternEquiv<DS64Bit4ByteAligned>;
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def gi_ds_128bit_8byte_aligned :
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GIComplexOperandMatcher<s64, "selectDS128Bit8ByteAligned">,
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GIComplexPatternEquiv<DS128Bit8ByteAligned>;
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def gi_mubuf_addr64 :
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GIComplexOperandMatcher<s64, "selectMUBUFAddr64">,
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GIComplexPatternEquiv<MUBUFAddr64>;
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def gi_mubuf_offset :
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GIComplexOperandMatcher<s64, "selectMUBUFOffset">,
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GIComplexPatternEquiv<MUBUFOffset>;
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def gi_smrd_buffer_imm :
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GIComplexOperandMatcher<s64, "selectSMRDBufferImm">,
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GIComplexPatternEquiv<SMRDBufferImm>;
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def gi_smrd_buffer_imm32 :
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GIComplexOperandMatcher<s64, "selectSMRDBufferImm32">,
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GIComplexPatternEquiv<SMRDBufferImm32>;
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def gi_smrd_buffer_sgpr_imm :
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GIComplexOperandMatcher<s64, "selectSMRDBufferSgprImm">,
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GIComplexPatternEquiv<SMRDBufferSgprImm>;
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def gi_vop3_mad_mix_mods :
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GIComplexOperandMatcher<s64, "selectVOP3PMadMixMods">,
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GIComplexPatternEquiv<VOP3PMadMixMods>;
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def gi_vop3_mad_mix_mods_ext :
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GIComplexOperandMatcher<s64, "selectVOP3PMadMixModsExt">,
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GIComplexPatternEquiv<VOP3PMadMixModsExt>;
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// Separate load nodes are defined to glue m0 initialization in
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// SelectionDAG. The GISel selector can just insert m0 initialization
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// directly before selecting a glue-less load, so hide this
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// distinction.
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def : GINodeEquiv<G_LOAD, AMDGPUld_glue> {
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let CheckMMOIsNonAtomic = 1;
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let IfSignExtend = G_SEXTLOAD;
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let IfZeroExtend = G_ZEXTLOAD;
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}
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def : GINodeEquiv<G_STORE, AMDGPUst_glue> {
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let CheckMMOIsNonAtomic = 1;
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}
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def : GINodeEquiv<G_LOAD, AMDGPUatomic_ld_glue> {
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bit CheckMMOIsAtomic = 1;
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let IfSignExtend = G_SEXTLOAD;
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let IfZeroExtend = G_ZEXTLOAD;
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}
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def : GINodeEquiv<G_STORE, AMDGPUatomic_st_glue> {
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bit CheckMMOIsAtomic = 1;
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}
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def : GINodeEquiv<G_ATOMIC_CMPXCHG, atomic_cmp_swap_glue>;
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def : GINodeEquiv<G_ATOMICRMW_XCHG, atomic_swap_glue>;
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def : GINodeEquiv<G_ATOMICRMW_ADD, atomic_load_add_glue>;
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def : GINodeEquiv<G_ATOMICRMW_SUB, atomic_load_sub_glue>;
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def : GINodeEquiv<G_ATOMICRMW_AND, atomic_load_and_glue>;
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def : GINodeEquiv<G_ATOMICRMW_OR, atomic_load_or_glue>;
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def : GINodeEquiv<G_ATOMICRMW_XOR, atomic_load_xor_glue>;
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def : GINodeEquiv<G_ATOMICRMW_MIN, atomic_load_min_glue>;
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def : GINodeEquiv<G_ATOMICRMW_MAX, atomic_load_max_glue>;
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def : GINodeEquiv<G_ATOMICRMW_UMIN, atomic_load_umin_glue>;
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def : GINodeEquiv<G_ATOMICRMW_UMAX, atomic_load_umax_glue>;
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def : GINodeEquiv<G_ATOMICRMW_FADD, atomic_load_fadd_glue>;
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def : GINodeEquiv<G_AMDGPU_FFBH_U32, AMDGPUffbh_u32_impl>;
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def : GINodeEquiv<G_AMDGPU_FFBL_B32, AMDGPUffbl_b32_impl>;
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def : GINodeEquiv<G_AMDGPU_FMIN_LEGACY, AMDGPUfmin_legacy>;
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def : GINodeEquiv<G_AMDGPU_FMAX_LEGACY, AMDGPUfmax_legacy>;
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def : GINodeEquiv<G_AMDGPU_RCP_IFLAG, AMDGPUrcp_iflag>;
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def : GINodeEquiv<G_AMDGPU_CVT_F32_UBYTE0, AMDGPUcvt_f32_ubyte0>;
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def : GINodeEquiv<G_AMDGPU_CVT_F32_UBYTE1, AMDGPUcvt_f32_ubyte1>;
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def : GINodeEquiv<G_AMDGPU_CVT_F32_UBYTE2, AMDGPUcvt_f32_ubyte2>;
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def : GINodeEquiv<G_AMDGPU_CVT_F32_UBYTE3, AMDGPUcvt_f32_ubyte3>;
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def : GINodeEquiv<G_AMDGPU_CVT_PK_I16_I32, AMDGPUpk_i16_i32_impl>;
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def : GINodeEquiv<G_AMDGPU_SMED3, AMDGPUsmed3>;
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def : GINodeEquiv<G_AMDGPU_UMED3, AMDGPUumed3>;
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def : GINodeEquiv<G_AMDGPU_FMED3, AMDGPUfmed3_impl>;
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def : GINodeEquiv<G_AMDGPU_CLAMP, AMDGPUclamp>;
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def : GINodeEquiv<G_AMDGPU_ATOMIC_CMPXCHG, AMDGPUatomic_cmp_swap>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD, SIbuffer_load>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_USHORT, SIbuffer_load_ushort>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_UBYTE, SIbuffer_load_ubyte>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SSHORT, SIbuffer_load_short>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SBYTE, SIbuffer_load_byte>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_TFE, SIbuffer_load_tfe>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_USHORT_TFE, SIbuffer_load_ushort_tfe>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_UBYTE_TFE, SIbuffer_load_ubyte_tfe>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SSHORT_TFE, SIbuffer_load_short_tfe>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SBYTE_TFE, SIbuffer_load_byte_tfe>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_FORMAT, SIbuffer_load_format>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_FORMAT_TFE, SIbuffer_load_format_tfe>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_FORMAT_D16, SIbuffer_load_format_d16>;
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def : GINodeEquiv<G_AMDGPU_TBUFFER_LOAD_FORMAT, SItbuffer_load>;
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def : GINodeEquiv<G_AMDGPU_TBUFFER_LOAD_FORMAT_D16, SItbuffer_load_d16>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_STORE, SIbuffer_store>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_STORE_SHORT, SIbuffer_store_short>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_STORE_BYTE, SIbuffer_store_byte>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_STORE_FORMAT, SIbuffer_store_format>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_STORE_FORMAT_D16, SIbuffer_store_format_d16>;
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def : GINodeEquiv<G_AMDGPU_TBUFFER_STORE_FORMAT, SItbuffer_store>;
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def : GINodeEquiv<G_AMDGPU_TBUFFER_STORE_FORMAT_D16, SItbuffer_store_d16>;
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// FIXME: Check MMO is atomic
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def : GINodeEquiv<G_ATOMICRMW_UINC_WRAP, atomic_load_uinc_wrap_glue>;
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def : GINodeEquiv<G_ATOMICRMW_UDEC_WRAP, atomic_load_udec_wrap_glue>;
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def : GINodeEquiv<G_ATOMICRMW_FMIN, atomic_load_fmin_glue>;
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def : GINodeEquiv<G_ATOMICRMW_FMAX, atomic_load_fmax_glue>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_SWAP, SIbuffer_atomic_swap>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_ADD, SIbuffer_atomic_add>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_SUB, SIbuffer_atomic_sub>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_SMIN, SIbuffer_atomic_smin>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_UMIN, SIbuffer_atomic_umin>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_SMAX, SIbuffer_atomic_smax>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_UMAX, SIbuffer_atomic_umax>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_AND, SIbuffer_atomic_and>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_OR, SIbuffer_atomic_or>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_XOR, SIbuffer_atomic_xor>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_INC, SIbuffer_atomic_inc>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_DEC, SIbuffer_atomic_dec>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_FADD, SIbuffer_atomic_fadd>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_FMIN, SIbuffer_atomic_fmin>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_FMAX, SIbuffer_atomic_fmax>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_CMPSWAP, SIbuffer_atomic_cmpswap>;
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def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_COND_SUB_U32, SIbuffer_atomic_cond_sub_u32>;
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def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD, SIsbuffer_load>;
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def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD_SBYTE, SIsbuffer_load_byte>;
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def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD_UBYTE, SIsbuffer_load_ubyte>;
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def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD_SSHORT, SIsbuffer_load_short>;
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def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD_USHORT, SIsbuffer_load_ushort>;
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def : GINodeEquiv<G_AMDGPU_S_BUFFER_PREFETCH, SIsbuffer_prefetch>;
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class GISelSop2Pat <
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SDPatternOperator node,
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Instruction inst,
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ValueType dst_vt,
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ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
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(dst_vt (node (src0_vt SReg_32:$src0), (src1_vt SReg_32:$src1))),
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(inst src0_vt:$src0, src1_vt:$src1)
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>;
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class GISelVop2Pat <
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SDPatternOperator node,
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Instruction inst,
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ValueType dst_vt,
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ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
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(dst_vt (node (src0_vt (sd_vsrc0 src0_vt:$src0)), (src1_vt VGPR_32:$src1))),
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(inst src0_vt:$src0, src1_vt:$src1)
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>;
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class GISelVop2CommutePat <
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SDPatternOperator node,
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Instruction inst,
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ValueType dst_vt,
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ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
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(dst_vt (node (src1_vt VGPR_32:$src1), (src0_vt (sd_vsrc0 src0_vt:$src0)))),
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(inst src0_vt:$src0, src1_vt:$src1)
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>;
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class GISelVop3Pat2 <
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SDPatternOperator node,
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Instruction inst,
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ValueType dst_vt,
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ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
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(dst_vt (node (src0_vt (sd_vcsrc src0_vt:$src0)), (src1_vt (sd_vcsrc src1_vt:$src1)))),
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(inst src0_vt:$src0, src1_vt:$src1)
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>;
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class GISelVop3Pat2CommutePat <
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SDPatternOperator node,
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Instruction inst,
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ValueType dst_vt,
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ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
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(dst_vt (node (src0_vt (sd_vcsrc src0_vt:$src0)), (src1_vt (sd_vcsrc src1_vt:$src1)))),
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(inst src0_vt:$src1, src1_vt:$src0)
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>;
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class GISelVop3Pat2ModsPat <
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SDPatternOperator node,
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Instruction inst,
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ValueType dst_vt,
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ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
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(dst_vt (node (src0_vt (VOP3Mods0 src0_vt:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omods)),
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(src1_vt (VOP3Mods src1_vt:$src1, i32:$src1_modifiers)))),
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(inst i32:$src0_modifiers, src0_vt:$src0,
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i32:$src1_modifiers, src1_vt:$src1, $clamp, $omods)
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>;
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multiclass GISelVop2IntrPat <
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SDPatternOperator node, Instruction inst,
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ValueType dst_vt, ValueType src_vt = dst_vt> {
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def : GISelVop2Pat <node, inst, dst_vt, src_vt>;
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// FIXME: Intrinsics aren't marked as commutable, so we need to add an explicit
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// pattern to handle commuting. This is another reason why legalizing to a
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// generic machine instruction may be better that matching the intrinsic
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// directly.
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def : GISelVop2CommutePat <node, inst, dst_vt, src_vt>;
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}
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// Since GlobalISel is more flexible then SelectionDAG, I think we can get
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// away with adding patterns for integer types and not legalizing all
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// loads and stores to vector types. This should help simplify the load/store
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// legalization.
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foreach Ty = [i64, p0, p1, p4] in {
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defm : SMRD_Pattern <"S_LOAD_DWORDX2", Ty>;
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}
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def gi_as_i32timm : GICustomOperandRenderer<"renderTruncTImm">,
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GISDNodeXFormEquiv<as_i32timm>;
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def gi_as_i16timm : GICustomOperandRenderer<"renderTruncTImm">,
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GISDNodeXFormEquiv<as_i16timm>;
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def gi_as_i8timm : GICustomOperandRenderer<"renderTruncTImm">,
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GISDNodeXFormEquiv<as_i8timm>;
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def gi_as_i1timm : GICustomOperandRenderer<"renderTruncTImm">,
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GISDNodeXFormEquiv<as_i1timm>;
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def gi_NegateImm : GICustomOperandRenderer<"renderNegateImm">,
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GISDNodeXFormEquiv<NegateImm>;
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def gi_bitcast_fpimm_to_i32 : GICustomOperandRenderer<"renderBitcastFPImm32">,
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GISDNodeXFormEquiv<bitcast_fpimm_to_i32>;
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def gi_bitcast_fpimm_to_i64 : GICustomOperandRenderer<"renderBitcastFPImm64">,
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GISDNodeXFormEquiv<bitcast_fpimm_to_i64>;
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def gi_IMMPopCount : GICustomOperandRenderer<"renderPopcntImm">,
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GISDNodeXFormEquiv<IMMPopCount>;
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def gi_extract_cpol : GICustomOperandRenderer<"renderExtractCPol">,
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GISDNodeXFormEquiv<extract_cpol>;
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def gi_extract_swz : GICustomOperandRenderer<"renderExtractSWZ">,
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GISDNodeXFormEquiv<extract_swz>;
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def gi_extract_cpol_set_glc : GICustomOperandRenderer<"renderExtractCpolSetGLC">,
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GISDNodeXFormEquiv<extract_cpol_set_glc>;
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def gi_frameindex_to_targetframeindex : GICustomOperandRenderer<"renderFrameIndex">,
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|
GISDNodeXFormEquiv<frameindex_to_targetframeindex>;
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def gi_fp_pow2_to_exponent : GICustomOperandRenderer<"renderFPPow2ToExponent">,
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|
GISDNodeXFormEquiv<FPPow2ToExponentXForm>;
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def gi_as_hw_round_mode : GICustomOperandRenderer<"renderRoundMode">,
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|
GISDNodeXFormEquiv<as_hw_round_mode>;
|