db158c7c83
Refresh of the generic scheduling model to use A510 instead of A55. Main benefits are to the little core, and introducing SVE scheduling information. Changes tested on various OoO cores, no performance degradation is seen. Differential Revision: https://reviews.llvm.org/D156799
78 lines
2.6 KiB
LLVM
78 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple arm64-none-eabi -o - %s | FileCheck %s --check-prefixes=CHECK,SDISEL
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; RUN: llc -mtriple arm64-none-eabi -global-isel -o - %s | FileCheck %s --check-prefixes=CHECK,GISEL
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@out = internal global i32 0, align 4
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; Ensure that we transform select(C0, x, select(C1, x, y)) towards
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; select(C0 | C1, x, y) so we can use CMP;CCMP for the implementation.
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define i32 @test0(i32 %v0, i32 %v1, i32 %v2) {
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; SDISEL-LABEL: test0:
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; SDISEL: // %bb.0:
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; SDISEL-NEXT: cmp w0, #7
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; SDISEL-NEXT: ccmp w1, #0, #0, ne
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; SDISEL-NEXT: csel w0, w1, w2, gt
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; SDISEL-NEXT: ret
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;
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; GISEL-LABEL: test0:
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; GISEL: // %bb.0:
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; GISEL-NEXT: cmp w0, #7
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; GISEL-NEXT: csel w8, w1, w2, eq
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; GISEL-NEXT: cmp w1, #0
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; GISEL-NEXT: csel w0, w1, w8, gt
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; GISEL-NEXT: ret
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%cmp1 = icmp eq i32 %v0, 7
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%cmp2 = icmp sgt i32 %v1, 0
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%sel0 = select i1 %cmp1, i32 %v1, i32 %v2
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%sel1 = select i1 %cmp2, i32 %v1, i32 %sel0
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ret i32 %sel1
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}
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; Usually we keep select(C0 | C1, x, y) as is on aarch64 to create CMP;CCMP
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; sequences. This case should be transformed to select(C0, select(C1, x, y), y)
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; anyway to get CSE effects.
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define void @test1(i32 %bitset, i32 %val0, i32 %val1) {
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; SDISEL-LABEL: test1:
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; SDISEL: // %bb.0:
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; SDISEL-NEXT: cmp w0, #7
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; SDISEL-NEXT: adrp x9, out
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; SDISEL-NEXT: csel w8, w1, w2, eq
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; SDISEL-NEXT: cmp w8, #13
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; SDISEL-NEXT: csel w8, w1, w2, lo
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; SDISEL-NEXT: cmp w0, #42
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; SDISEL-NEXT: csel w10, w1, w8, eq
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; SDISEL-NEXT: str w8, [x9, :lo12:out]
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; SDISEL-NEXT: str w10, [x9, :lo12:out]
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; SDISEL-NEXT: ret
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;
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; GISEL-LABEL: test1:
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; GISEL: // %bb.0:
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; GISEL-NEXT: cmp w0, #7
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; GISEL-NEXT: csel w8, w1, w2, eq
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; GISEL-NEXT: cmp w8, #13
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; GISEL-NEXT: cset w8, lo
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; GISEL-NEXT: tst w8, #0x1
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; GISEL-NEXT: csel w9, w1, w2, ne
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; GISEL-NEXT: cmp w0, #42
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; GISEL-NEXT: cset w10, eq
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; GISEL-NEXT: orr w8, w10, w8
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; GISEL-NEXT: tst w8, #0x1
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; GISEL-NEXT: adrp x8, out
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; GISEL-NEXT: csel w10, w1, w2, ne
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; GISEL-NEXT: str w9, [x8, :lo12:out]
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; GISEL-NEXT: str w10, [x8, :lo12:out]
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; GISEL-NEXT: ret
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%cmp1 = icmp eq i32 %bitset, 7
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%cond = select i1 %cmp1, i32 %val0, i32 %val1
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%cmp5 = icmp ult i32 %cond, 13
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%cond11 = select i1 %cmp5, i32 %val0, i32 %val1
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%cmp3 = icmp eq i32 %bitset, 42
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%or.cond = or i1 %cmp3, %cmp5
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%cond17 = select i1 %or.cond, i32 %val0, i32 %val1
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store volatile i32 %cond11, ptr @out, align 4
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store volatile i32 %cond17, ptr @out, align 4
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ret void
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}
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; CHECK: {{.*}}
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