Files
clang-p2996/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fast-math-flags.ll
Fangrui Song 9e9907f1cf [AMDGPU,test] Change llc -march= to -mtriple= (#75982)
Similar to 806761a762.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
2024-01-16 21:54:58 -08:00

32 lines
1.1 KiB
LLVM

; RUN: llc -mtriple=amdgcn -mcpu=fiji -O0 -stop-after=irtranslator -global-isel %s -o - | FileCheck %s
; Check flags are preserved for a regular instruction.
; CHECK-LABEL: name: fadd_nnan
; CHECK: nnan G_FADD
define amdgpu_kernel void @fadd_nnan(float %arg0, float %arg1) {
%res = fadd nnan float %arg0, %arg1
store float %res, ptr addrspace(1) undef
ret void
}
; Check flags are preserved for a specially handled intrinsic
; CHECK-LABEL: name: fma_fast
; CHECK: nnan ninf nsz arcp contract afn reassoc G_FMA
define amdgpu_kernel void @fma_fast(float %arg0, float %arg1, float %arg2) {
%res = call fast float @llvm.fma.f32(float %arg0, float %arg1, float %arg2)
store float %res, ptr addrspace(1) undef
ret void
}
; Check flags are preserved for an arbitrarry target intrinsic
; CHECK-LABEL: name: rcp_nsz
; CHECK: = nsz G_INTRINSIC intrinsic(@llvm.amdgcn.rcp), %{{[0-9]+}}(s32)
define amdgpu_kernel void @rcp_nsz(float %arg0) {
%res = call nsz float @llvm.amdgcn.rcp.f32 (float %arg0)
store float %res, ptr addrspace(1) undef
ret void
}
declare float @llvm.fma.f32(float, float, float)
declare float @llvm.amdgcn.rcp.f32(float)