7852ebc088
Before llvm20, (void)__sync_fetch_and_add(...) always generates locked xadd insns. In linux kernel upstream discussion [1], it is found that for arm64 architecture, the original semantics of (void)__sync_fetch_and_add(...), i.e., __atomic_fetch_add(...), is preferred in order for jit to emit proper native barrier insns. In llvm commits [2] and [3], (void)__sync_fetch_and_add(...) will generate the following insns: - for cpu v1/v2: locked xadd insns to keep backward compatibility - for cpu v3/v4: __atomic_fetch_add() insns To ensure proper barrier semantics for (void)__sync_fetch_and_add(...), cpu v3/v4 is recommended. This patch enables cpu=v3 as the default cpu version. For users wanting to use cpu v1, -mcpu=v1 needs to be explicitly added to clang/llc command line. [1] https://lore.kernel.org/bpf/ZqqiQQWRnz7H93Hc@google.com/T/#mb68d67bc8f39e35a0c3db52468b9de59b79f021f [2] https://github.com/llvm/llvm-project/pull/101428 [3] https://github.com/llvm/llvm-project/pull/106494
305 lines
8.0 KiB
LLVM
305 lines
8.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc < %s -march=bpf -mcpu=v1 | FileCheck %s
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; test that we can expand CTTZ & CTLZ
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declare i32 @llvm.cttz.i32(i32, i1)
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define i32 @cttz_i32_zdef(i32 %a) {
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; CHECK-LABEL: cttz_i32_zdef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 = -r2
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; CHECK-NEXT: r1 &= r2
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; CHECK-NEXT: r1 *= 125613361
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; CHECK-NEXT: r2 = 4160749568 ll
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; CHECK-NEXT: r1 &= r2
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; CHECK-NEXT: r1 >>= 27
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; CHECK-NEXT: r2 = {{\.?LCPI[0-9]+_[0-9]+}} ll
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; CHECK-NEXT: r2 += r1
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; CHECK-NEXT: r0 = *(u8 *)(r2 + 0)
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; CHECK-NEXT: exit
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%ret = call i32 @llvm.cttz.i32(i32 %a, i1 1)
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ret i32 %ret
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}
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define i32 @cttz_i32(i32 %a) {
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; CHECK-LABEL: cttz_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: r0 = 32
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 <<= 32
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; CHECK-NEXT: r2 >>= 32
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; CHECK-NEXT: if r2 == 0 goto LBB1_2
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; CHECK-NEXT: # %bb.1: # %cond.false
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 = -r2
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; CHECK-NEXT: r1 &= r2
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; CHECK-NEXT: r1 *= 125613361
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; CHECK-NEXT: r2 = 4160749568 ll
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; CHECK-NEXT: r1 &= r2
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; CHECK-NEXT: r1 >>= 27
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; CHECK-NEXT: r2 = {{\.?LCPI[0-9]+_[0-9]+}} ll
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; CHECK-NEXT: r2 += r1
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; CHECK-NEXT: r0 = *(u8 *)(r2 + 0)
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; CHECK-NEXT: LBB1_2: # %cond.end
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; CHECK-NEXT: exit
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%ret = call i32 @llvm.cttz.i32(i32 %a, i1 0)
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ret i32 %ret
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}
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declare i64 @llvm.cttz.i64(i64, i1)
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define i64 @cttz_i64_zdef(i64 %a) {
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; CHECK-LABEL: cttz_i64_zdef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 = -r2
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; CHECK-NEXT: r1 &= r2
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; CHECK-NEXT: r2 = 151050438420815295 ll
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; CHECK-NEXT: r1 *= r2
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; CHECK-NEXT: r1 >>= 58
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; CHECK-NEXT: r2 = {{\.?LCPI[0-9]+_[0-9]+}} ll
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; CHECK-NEXT: r2 += r1
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; CHECK-NEXT: r0 = *(u8 *)(r2 + 0)
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; CHECK-NEXT: exit
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%ret = call i64 @llvm.cttz.i64(i64 %a, i1 1)
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ret i64 %ret
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}
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define i64 @cttz_i64(i64 %a) {
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; CHECK-LABEL: cttz_i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: r0 = 64
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; CHECK-NEXT: if r1 == 0 goto LBB3_2
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; CHECK-NEXT: # %bb.1: # %cond.false
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 = -r2
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; CHECK-NEXT: r1 &= r2
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; CHECK-NEXT: r2 = 151050438420815295 ll
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; CHECK-NEXT: r1 *= r2
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; CHECK-NEXT: r1 >>= 58
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; CHECK-NEXT: r2 = {{\.?LCPI[0-9]+_[0-9]+}} ll
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; CHECK-NEXT: r2 += r1
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; CHECK-NEXT: r0 = *(u8 *)(r2 + 0)
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; CHECK-NEXT: LBB3_2: # %cond.end
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; CHECK-NEXT: exit
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%ret = call i64 @llvm.cttz.i64(i64 %a, i1 0)
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ret i64 %ret
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}
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declare i32 @llvm.ctlz.i32(i32, i1)
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define i32 @ctlz_i32_zdef(i32 %a) {
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; CHECK-LABEL: ctlz_i32_zdef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: r2 = 4294967294 ll
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; CHECK-NEXT: r3 = r1
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; CHECK-NEXT: r3 &= r2
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; CHECK-NEXT: r3 >>= 1
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; CHECK-NEXT: r1 |= r3
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; CHECK-NEXT: r2 = 4294967292 ll
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; CHECK-NEXT: r3 = r1
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; CHECK-NEXT: r3 &= r2
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; CHECK-NEXT: r3 >>= 2
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; CHECK-NEXT: r1 |= r3
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; CHECK-NEXT: r2 = 4294967280 ll
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; CHECK-NEXT: r3 = r1
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; CHECK-NEXT: r3 &= r2
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; CHECK-NEXT: r3 >>= 4
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; CHECK-NEXT: r1 |= r3
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; CHECK-NEXT: r2 = 4294967040 ll
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; CHECK-NEXT: r3 = r1
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; CHECK-NEXT: r3 &= r2
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; CHECK-NEXT: r3 >>= 8
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; CHECK-NEXT: r1 |= r3
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; CHECK-NEXT: r2 = 4294901760 ll
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; CHECK-NEXT: r3 = r1
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; CHECK-NEXT: r3 &= r2
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; CHECK-NEXT: r3 >>= 16
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; CHECK-NEXT: r1 |= r3
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; CHECK-NEXT: r1 ^= -1
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 1
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; CHECK-NEXT: r2 &= 1431655765
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; CHECK-NEXT: r1 -= r2
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; CHECK-NEXT: r0 = r1
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; CHECK-NEXT: r0 &= 858993459
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; CHECK-NEXT: r1 >>= 2
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; CHECK-NEXT: r1 &= 858993459
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; CHECK-NEXT: r0 += r1
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; CHECK-NEXT: r1 = r0
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; CHECK-NEXT: r1 >>= 4
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; CHECK-NEXT: r0 += r1
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; CHECK-NEXT: r0 &= 252645135
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; CHECK-NEXT: r0 *= 16843009
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; CHECK-NEXT: r1 = 4278190080 ll
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; CHECK-NEXT: r0 &= r1
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; CHECK-NEXT: r0 >>= 24
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; CHECK-NEXT: exit
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%ret = call i32 @llvm.ctlz.i32(i32 %a, i1 1)
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ret i32 %ret
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}
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define i32 @ctlz_i32(i32 %a) {
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; CHECK-LABEL: ctlz_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: r0 = 32
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 <<= 32
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; CHECK-NEXT: r2 >>= 32
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; CHECK-NEXT: if r2 == 0 goto LBB5_2
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; CHECK-NEXT: # %bb.1: # %cond.false
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; CHECK-NEXT: r2 = 4294967294 ll
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; CHECK-NEXT: r3 = r1
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; CHECK-NEXT: r3 &= r2
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; CHECK-NEXT: r3 >>= 1
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; CHECK-NEXT: r1 |= r3
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; CHECK-NEXT: r2 = 4294967292 ll
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; CHECK-NEXT: r3 = r1
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; CHECK-NEXT: r3 &= r2
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; CHECK-NEXT: r3 >>= 2
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; CHECK-NEXT: r1 |= r3
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; CHECK-NEXT: r2 = 4294967280 ll
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; CHECK-NEXT: r3 = r1
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; CHECK-NEXT: r3 &= r2
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; CHECK-NEXT: r3 >>= 4
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; CHECK-NEXT: r1 |= r3
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; CHECK-NEXT: r2 = 4294967040 ll
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; CHECK-NEXT: r3 = r1
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; CHECK-NEXT: r3 &= r2
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; CHECK-NEXT: r3 >>= 8
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; CHECK-NEXT: r1 |= r3
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; CHECK-NEXT: r2 = 4294901760 ll
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; CHECK-NEXT: r3 = r1
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; CHECK-NEXT: r3 &= r2
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; CHECK-NEXT: r3 >>= 16
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; CHECK-NEXT: r1 |= r3
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; CHECK-NEXT: r1 ^= -1
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 1
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; CHECK-NEXT: r2 &= 1431655765
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; CHECK-NEXT: r1 -= r2
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; CHECK-NEXT: r0 = r1
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; CHECK-NEXT: r0 &= 858993459
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; CHECK-NEXT: r1 >>= 2
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; CHECK-NEXT: r1 &= 858993459
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; CHECK-NEXT: r0 += r1
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; CHECK-NEXT: r1 = r0
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; CHECK-NEXT: r1 >>= 4
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; CHECK-NEXT: r0 += r1
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; CHECK-NEXT: r0 &= 252645135
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; CHECK-NEXT: r0 *= 16843009
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; CHECK-NEXT: r1 = 4278190080 ll
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; CHECK-NEXT: r0 &= r1
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; CHECK-NEXT: r0 >>= 24
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; CHECK-NEXT: LBB5_2: # %cond.end
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; CHECK-NEXT: exit
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%ret = call i32 @llvm.ctlz.i32(i32 %a, i1 0)
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ret i32 %ret
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}
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declare i64 @llvm.ctlz.i64(i64, i1)
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define i64 @ctlz_i64_zdef(i64 %a) {
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; CHECK-LABEL: ctlz_i64_zdef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 1
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; CHECK-NEXT: r1 |= r2
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 2
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; CHECK-NEXT: r1 |= r2
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 4
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; CHECK-NEXT: r1 |= r2
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 8
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; CHECK-NEXT: r1 |= r2
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 16
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; CHECK-NEXT: r1 |= r2
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 32
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; CHECK-NEXT: r1 |= r2
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; CHECK-NEXT: r1 ^= -1
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; CHECK-NEXT: r2 = 6148914691236517205 ll
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; CHECK-NEXT: r3 = r1
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; CHECK-NEXT: r3 >>= 1
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; CHECK-NEXT: r3 &= r2
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; CHECK-NEXT: r1 -= r3
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; CHECK-NEXT: r2 = 3689348814741910323 ll
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; CHECK-NEXT: r0 = r1
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; CHECK-NEXT: r0 &= r2
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; CHECK-NEXT: r1 >>= 2
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; CHECK-NEXT: r1 &= r2
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; CHECK-NEXT: r0 += r1
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; CHECK-NEXT: r1 = r0
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; CHECK-NEXT: r1 >>= 4
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; CHECK-NEXT: r0 += r1
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; CHECK-NEXT: r1 = 1085102592571150095 ll
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; CHECK-NEXT: r0 &= r1
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; CHECK-NEXT: r1 = 72340172838076673 ll
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; CHECK-NEXT: r0 *= r1
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; CHECK-NEXT: r0 >>= 56
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; CHECK-NEXT: exit
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%ret = call i64 @llvm.ctlz.i64(i64 %a, i1 1)
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ret i64 %ret
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}
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define i64 @ctlz_i64(i64 %a) {
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; CHECK-LABEL: ctlz_i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: r0 = 64
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; CHECK-NEXT: if r1 == 0 goto LBB7_2
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; CHECK-NEXT: # %bb.1: # %cond.false
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 1
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; CHECK-NEXT: r1 |= r2
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 2
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; CHECK-NEXT: r1 |= r2
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 4
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; CHECK-NEXT: r1 |= r2
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 8
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; CHECK-NEXT: r1 |= r2
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 16
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; CHECK-NEXT: r1 |= r2
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; CHECK-NEXT: r2 = r1
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; CHECK-NEXT: r2 >>= 32
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; CHECK-NEXT: r1 |= r2
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; CHECK-NEXT: r1 ^= -1
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; CHECK-NEXT: r2 = 6148914691236517205 ll
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; CHECK-NEXT: r3 = r1
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; CHECK-NEXT: r3 >>= 1
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; CHECK-NEXT: r3 &= r2
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; CHECK-NEXT: r1 -= r3
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; CHECK-NEXT: r2 = 3689348814741910323 ll
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; CHECK-NEXT: r0 = r1
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; CHECK-NEXT: r0 &= r2
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; CHECK-NEXT: r1 >>= 2
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; CHECK-NEXT: r1 &= r2
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; CHECK-NEXT: r0 += r1
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; CHECK-NEXT: r1 = r0
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; CHECK-NEXT: r1 >>= 4
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; CHECK-NEXT: r0 += r1
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; CHECK-NEXT: r1 = 1085102592571150095 ll
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; CHECK-NEXT: r0 &= r1
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; CHECK-NEXT: r1 = 72340172838076673 ll
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; CHECK-NEXT: r0 *= r1
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; CHECK-NEXT: r0 >>= 56
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; CHECK-NEXT: LBB7_2: # %cond.end
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; CHECK-NEXT: exit
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%ret = call i64 @llvm.ctlz.i64(i64 %a, i1 0)
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ret i64 %ret
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}
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