afb6dafc6b
This commits add the WaveIsFirstLane() hlsl intrinsinc. This intrinsic uses the convergence intrinsincs for the SPIR-V backend. On the DXIL side, I'm not sure what the strategy is for convergence, so I implemented that like in DXC: a normal builtin function. Signed-off-by: Nathan Gauër <brioche@google.com>
14 lines
502 B
LLVM
14 lines
502 B
LLVM
; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-compute %s | FileCheck %s
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define void @main() #0 {
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entry:
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; CHECK: call i1 @dx.op.waveIsFirstLane(i32 110)
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%0 = call i1 @llvm.dx.wave.is.first.lane()
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ret void
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}
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declare i1 @llvm.dx.wave.is.first.lane() #1
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attributes #0 = { convergent norecurse "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #1 = { convergent nocallback nofree nosync nounwind willreturn }
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