c4c9d4f306
Add support for the moveq instruction, which is both faster and smaller (1/2 to 1/3 the size) than a move with immediate to register. This change introduces the instruction, along with a set of pseudoinstructions to handle immediate moves to a register that is lowered post-RA. Pseudos are used as moveq can only write to the full register, which makes matching i8 and i16 immediate loads difficult in tablegen. Furthermore, selecting moveq before RA constrains that immediate to be moved into a data register, which may not be optimal. The bulk of this change are fixes to existing tests, which cover the new functionality sufficiently.
17 lines
480 B
LLVM
17 lines
480 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=m68k-linux < %s -verify-machineinstrs | FileCheck %s
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define i32 @test1(i32 %x) {
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; CHECK-LABEL: test1:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0:
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; CHECK-NEXT: move.l (4,%sp), %d1
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; CHECK-NEXT: eori.l #31, %d1
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; CHECK-NEXT: moveq #32, %d0
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; CHECK-NEXT: sub.l %d1, %d0
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; CHECK-NEXT: rts
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%xor = xor i32 %x, 31
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%sub = sub i32 32, %xor
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ret i32 %sub
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}
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