caio/clang-p2996
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
890c4bece26e005cd9fa5511fe0efa7307794de5
clang-p2996/llvm/test/CodeGen/M68k/Atomics/load-store.ll
Peter Lafreniere ebbc5de7db [M68k] Correctly emit non-pic relocations (#89863) 
The m68k backend will always emit external calls (including libcalls)
with
PC-relative PLT relocations, even when in non-pic mode or -fno-plt is
used.

This is unexpected, as other function calls are emitted with absolute
addressing, and a static code modes suggests that there is no PLT. It
also
leads to a miscompilation where the call instruction emitted expects an
immediate address, while the relocation emitted for that instruction is
PC-relative.

This miscompilation can even be seen in the default C function in
godbolt:
https://godbolt.org/z/zEoazovzo

Fix the issue by classifying external function references based upon the
pic
mode. This triggers a change in the static code model, making it more in
line
with the expected behaviour and allowing use of this backend in more
bare-metal
situations where a PLT does not exist.

The change avoids the issue where we emit a PLT32 relocation for an
absolute
call, and makes libcalls and other external calls use absolute
addressing modes
when a static code model is desired.

Further work should be done in instruction lowering and validation to
ensure
that miscompilations of the same type don't occur.
2024-05-03 23:14:56 +08:00

607 lines
19 KiB
LLVM
Raw Blame History

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 | FileCheck %s --check-prefix=NO-ATOMIC
; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 | FileCheck %s --check-prefix=NO-ATOMIC
; RUN: llc %s -o - -mtriple=m68k -mcpu=M68020 | FileCheck %s --check-prefix=ATOMIC
; RUN: llc %s -o - -mtriple=m68k -mcpu=M68030 | FileCheck %s --check-prefix=ATOMIC
; RUN: llc %s -o - -mtriple=m68k -mcpu=M68040 | FileCheck %s --check-prefix=ATOMIC
define i8 @atomic_load_i8_unordered(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i8_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.b (%a0), %d0
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i8_unordered:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b (%a0), %d0
; ATOMIC-NEXT: rts
%1 = load atomic i8, ptr %a unordered, align 1
ret i8 %1
}
define i8 @atomic_load_i8_monotonic(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i8_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.b (%a0), %d0
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i8_monotonic:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b (%a0), %d0
; ATOMIC-NEXT: rts
%1 = load atomic i8, ptr %a monotonic, align 1
ret i8 %1
}
define i8 @atomic_load_i8_acquire(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i8_acquire:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.b (%a0), %d0
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i8_acquire:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b (%a0), %d0
; ATOMIC-NEXT: rts
%1 = load atomic i8, ptr %a acquire, align 1
ret i8 %1
}
define i8 @atomic_load_i8_seq_cst(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i8_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.b (%a0), %d0
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i8_seq_cst:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b (%a0), %d0
; ATOMIC-NEXT: rts
%1 = load atomic i8, ptr %a seq_cst, align 1
ret i8 %1
}
define i16 @atomic_load_i16_unordered(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i16_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.w (%a0), %d0
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i16_unordered:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w (%a0), %d0
; ATOMIC-NEXT: rts
%1 = load atomic i16, ptr %a unordered, align 2
ret i16 %1
}
define i16 @atomic_load_i16_monotonic(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i16_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.w (%a0), %d0
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i16_monotonic:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w (%a0), %d0
; ATOMIC-NEXT: rts
%1 = load atomic i16, ptr %a monotonic, align 2
ret i16 %1
}
define i16 @atomic_load_i16_acquire(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i16_acquire:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.w (%a0), %d0
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i16_acquire:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w (%a0), %d0
; ATOMIC-NEXT: rts
%1 = load atomic i16, ptr %a acquire, align 2
ret i16 %1
}
define i16 @atomic_load_i16_seq_cst(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i16_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.w (%a0), %d0
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i16_seq_cst:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w (%a0), %d0
; ATOMIC-NEXT: rts
%1 = load atomic i16, ptr %a seq_cst, align 2
ret i16 %1
}
define i32 @atomic_load_i32_unordered(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i32_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.l (%a0), %d0
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i32_unordered:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l (%a0), %d0
; ATOMIC-NEXT: rts
%1 = load atomic i32, ptr %a unordered, align 4
ret i32 %1
}
define i32 @atomic_load_i32_monotonic(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i32_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.l (%a0), %d0
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i32_monotonic:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l (%a0), %d0
; ATOMIC-NEXT: rts
%1 = load atomic i32, ptr %a monotonic, align 4
ret i32 %1
}
define i32 @atomic_load_i32_acquire(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i32_acquire:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.l (%a0), %d0
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i32_acquire:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l (%a0), %d0
; ATOMIC-NEXT: rts
%1 = load atomic i32, ptr %a acquire, align 4
ret i32 %1
}
define i32 @atomic_load_i32_seq_cst(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i32_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.l (%a0), %d0
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i32_seq_cst:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l (%a0), %d0
; ATOMIC-NEXT: rts
%1 = load atomic i32, ptr %a seq_cst, align 4
ret i32 %1
}
define i64 @atomic_load_i64_unordered(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i64_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: move.l #0, (4,%sp)
; NO-ATOMIC-NEXT: move.l (16,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __atomic_load_8
; NO-ATOMIC-NEXT: adda.l #12, %sp
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i64_unordered:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: suba.l #12, %sp
; ATOMIC-NEXT: move.l #0, (4,%sp)
; ATOMIC-NEXT: move.l (16,%sp), (%sp)
; ATOMIC-NEXT: jsr __atomic_load_8
; ATOMIC-NEXT: adda.l #12, %sp
; ATOMIC-NEXT: rts
%1 = load atomic i64, ptr %a unordered, align 8
ret i64 %1
}
define i64 @atomic_load_i64_monotonic(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i64_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: move.l #0, (4,%sp)
; NO-ATOMIC-NEXT: move.l (16,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __atomic_load_8
; NO-ATOMIC-NEXT: adda.l #12, %sp
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i64_monotonic:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: suba.l #12, %sp
; ATOMIC-NEXT: move.l #0, (4,%sp)
; ATOMIC-NEXT: move.l (16,%sp), (%sp)
; ATOMIC-NEXT: jsr __atomic_load_8
; ATOMIC-NEXT: adda.l #12, %sp
; ATOMIC-NEXT: rts
%1 = load atomic i64, ptr %a monotonic, align 8
ret i64 %1
}
define i64 @atomic_load_i64_acquire(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i64_acquire:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: move.l #2, (4,%sp)
; NO-ATOMIC-NEXT: move.l (16,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __atomic_load_8
; NO-ATOMIC-NEXT: adda.l #12, %sp
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i64_acquire:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: suba.l #12, %sp
; ATOMIC-NEXT: move.l #2, (4,%sp)
; ATOMIC-NEXT: move.l (16,%sp), (%sp)
; ATOMIC-NEXT: jsr __atomic_load_8
; ATOMIC-NEXT: adda.l #12, %sp
; ATOMIC-NEXT: rts
%1 = load atomic i64, ptr %a acquire, align 8
ret i64 %1
}
define i64 @atomic_load_i64_seq_cst(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i64_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: move.l #5, (4,%sp)
; NO-ATOMIC-NEXT: move.l (16,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __atomic_load_8
; NO-ATOMIC-NEXT: adda.l #12, %sp
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_load_i64_seq_cst:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: suba.l #12, %sp
; ATOMIC-NEXT: move.l #5, (4,%sp)
; ATOMIC-NEXT: move.l (16,%sp), (%sp)
; ATOMIC-NEXT: jsr __atomic_load_8
; ATOMIC-NEXT: adda.l #12, %sp
; ATOMIC-NEXT: rts
%1 = load atomic i64, ptr %a seq_cst, align 8
ret i64 %1
}
define void @atomic_store_i8_unordered(ptr %a, i8 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i8_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.b (11,%sp), %d0
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.b %d0, (%a0)
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i8_unordered:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.b (11,%sp), %d0
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b %d0, (%a0)
; ATOMIC-NEXT: rts
store atomic i8 %val, ptr %a unordered, align 1
ret void
}
define void @atomic_store_i8_monotonic(ptr %a, i8 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i8_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.b (11,%sp), %d0
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.b %d0, (%a0)
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i8_monotonic:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.b (11,%sp), %d0
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b %d0, (%a0)
; ATOMIC-NEXT: rts
store atomic i8 %val, ptr %a monotonic, align 1
ret void
}
define void @atomic_store_i8_release(ptr %a, i8 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i8_release:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.b (11,%sp), %d0
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.b %d0, (%a0)
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i8_release:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.b (11,%sp), %d0
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b %d0, (%a0)
; ATOMIC-NEXT: rts
store atomic i8 %val, ptr %a release, align 1
ret void
}
define void @atomic_store_i8_seq_cst(ptr %a, i8 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i8_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.b (11,%sp), %d0
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.b %d0, (%a0)
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i8_seq_cst:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.b (11,%sp), %d0
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b %d0, (%a0)
; ATOMIC-NEXT: rts
store atomic i8 %val, ptr %a seq_cst, align 1
ret void
}
define void @atomic_store_i16_unordered(ptr %a, i16 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i16_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.w (10,%sp), %d0
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.w %d0, (%a0)
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i16_unordered:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.w (10,%sp), %d0
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w %d0, (%a0)
; ATOMIC-NEXT: rts
store atomic i16 %val, ptr %a unordered, align 2
ret void
}
define void @atomic_store_i16_monotonic(ptr %a, i16 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i16_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.w (10,%sp), %d0
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.w %d0, (%a0)
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i16_monotonic:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.w (10,%sp), %d0
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w %d0, (%a0)
; ATOMIC-NEXT: rts
store atomic i16 %val, ptr %a monotonic, align 2
ret void
}
define void @atomic_store_i16_release(ptr %a, i16 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i16_release:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.w (10,%sp), %d0
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.w %d0, (%a0)
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i16_release:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.w (10,%sp), %d0
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w %d0, (%a0)
; ATOMIC-NEXT: rts
store atomic i16 %val, ptr %a release, align 2
ret void
}
define void @atomic_store_i16_seq_cst(ptr %a, i16 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i16_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.w (10,%sp), %d0
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.w %d0, (%a0)
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i16_seq_cst:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.w (10,%sp), %d0
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w %d0, (%a0)
; ATOMIC-NEXT: rts
store atomic i16 %val, ptr %a seq_cst, align 2
ret void
}
define void @atomic_store_i32_unordered(ptr %a, i32 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i32_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (8,%sp), %d0
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.l %d0, (%a0)
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i32_unordered:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (8,%sp), %d0
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l %d0, (%a0)
; ATOMIC-NEXT: rts
store atomic i32 %val, ptr %a unordered, align 4
ret void
}
define void @atomic_store_i32_monotonic(ptr %a, i32 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i32_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (8,%sp), %d0
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.l %d0, (%a0)
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i32_monotonic:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (8,%sp), %d0
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l %d0, (%a0)
; ATOMIC-NEXT: rts
store atomic i32 %val, ptr %a monotonic, align 4
ret void
}
define void @atomic_store_i32_release(ptr %a, i32 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i32_release:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (8,%sp), %d0
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.l %d0, (%a0)
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i32_release:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (8,%sp), %d0
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l %d0, (%a0)
; ATOMIC-NEXT: rts
store atomic i32 %val, ptr %a release, align 4
ret void
}
define void @atomic_store_i32_seq_cst(ptr %a, i32 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i32_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (8,%sp), %d0
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
; NO-ATOMIC-NEXT: move.l %d0, (%a0)
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i32_seq_cst:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: move.l (8,%sp), %d0
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l %d0, (%a0)
; ATOMIC-NEXT: rts
store atomic i32 %val, ptr %a seq_cst, align 4
ret void
}
define void @atomic_store_i64_unordered(ptr %a, i64 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i64_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #20, %sp
; NO-ATOMIC-NEXT: move.l #0, (12,%sp)
; NO-ATOMIC-NEXT: move.l (32,%sp), (8,%sp)
; NO-ATOMIC-NEXT: move.l (28,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (24,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __atomic_store_8
; NO-ATOMIC-NEXT: adda.l #20, %sp
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i64_unordered:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: suba.l #20, %sp
; ATOMIC-NEXT: move.l #0, (12,%sp)
; ATOMIC-NEXT: move.l (32,%sp), (8,%sp)
; ATOMIC-NEXT: move.l (28,%sp), (4,%sp)
; ATOMIC-NEXT: move.l (24,%sp), (%sp)
; ATOMIC-NEXT: jsr __atomic_store_8
; ATOMIC-NEXT: adda.l #20, %sp
; ATOMIC-NEXT: rts
store atomic i64 %val, ptr %a unordered, align 8
ret void
}
define void @atomic_store_i64_monotonic(ptr %a, i64 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i64_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #20, %sp
; NO-ATOMIC-NEXT: move.l #0, (12,%sp)
; NO-ATOMIC-NEXT: move.l (32,%sp), (8,%sp)
; NO-ATOMIC-NEXT: move.l (28,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (24,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __atomic_store_8
; NO-ATOMIC-NEXT: adda.l #20, %sp
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i64_monotonic:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: suba.l #20, %sp
; ATOMIC-NEXT: move.l #0, (12,%sp)
; ATOMIC-NEXT: move.l (32,%sp), (8,%sp)
; ATOMIC-NEXT: move.l (28,%sp), (4,%sp)
; ATOMIC-NEXT: move.l (24,%sp), (%sp)
; ATOMIC-NEXT: jsr __atomic_store_8
; ATOMIC-NEXT: adda.l #20, %sp
; ATOMIC-NEXT: rts
store atomic i64 %val, ptr %a monotonic, align 8
ret void
}
define void @atomic_store_i64_release(ptr %a, i64 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i64_release:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #20, %sp
; NO-ATOMIC-NEXT: move.l #3, (12,%sp)
; NO-ATOMIC-NEXT: move.l (32,%sp), (8,%sp)
; NO-ATOMIC-NEXT: move.l (28,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (24,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __atomic_store_8
; NO-ATOMIC-NEXT: adda.l #20, %sp
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i64_release:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: suba.l #20, %sp
; ATOMIC-NEXT: move.l #3, (12,%sp)
; ATOMIC-NEXT: move.l (32,%sp), (8,%sp)
; ATOMIC-NEXT: move.l (28,%sp), (4,%sp)
; ATOMIC-NEXT: move.l (24,%sp), (%sp)
; ATOMIC-NEXT: jsr __atomic_store_8
; ATOMIC-NEXT: adda.l #20, %sp
; ATOMIC-NEXT: rts
store atomic i64 %val, ptr %a release, align 8
ret void
}
define void @atomic_store_i64_seq_cst(ptr %a, i64 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i64_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #20, %sp
; NO-ATOMIC-NEXT: move.l #5, (12,%sp)
; NO-ATOMIC-NEXT: move.l (32,%sp), (8,%sp)
; NO-ATOMIC-NEXT: move.l (28,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (24,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __atomic_store_8
; NO-ATOMIC-NEXT: adda.l #20, %sp
; NO-ATOMIC-NEXT: rts
;
; ATOMIC-LABEL: atomic_store_i64_seq_cst:
; ATOMIC: ; %bb.0:
; ATOMIC-NEXT: suba.l #20, %sp
; ATOMIC-NEXT: move.l #5, (12,%sp)
; ATOMIC-NEXT: move.l (32,%sp), (8,%sp)
; ATOMIC-NEXT: move.l (28,%sp), (4,%sp)
; ATOMIC-NEXT: move.l (24,%sp), (%sp)
; ATOMIC-NEXT: jsr __atomic_store_8
; ATOMIC-NEXT: adda.l #20, %sp
; ATOMIC-NEXT: rts
store atomic i64 %val, ptr %a seq_cst, align 8
ret void
}
Reference in New Issue View Git Blame Copy Permalink