53c37f300d
On PowerPC there are 128 bit VSX registers. These registers are half overlapped with 64 bit floating point registers (FPR). The 64 bit half of the VXS register that does not overlap with the FPR does not overlap with any other register class. The FPR are the only subregisters of the VSX registers but they do not fully cover the 128 bit super register. This leads to incorrect lane masks being created. This patch adds phony registers for the other half of the VSX registers in order to fully cover them and to make sure that the lane masks are not the same for the VSX and the floating point register.
223 lines
8.7 KiB
LLVM
223 lines
8.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s --check-prefixes=CHECK-LE
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \
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; RUN: --check-prefixes=CHECK-NOPCREL-BE
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -mattr=-pcrelative-memops -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK-NOPCREL-LE
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -mattr=-prefix-instrs -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK-NOPREFIX
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -target-abi=elfv2 -mcpu=pwr10 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK-BE
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define dso_local <2 x double> @testDoubleToDoubleFail() local_unnamed_addr {
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; CHECK-LE-LABEL: testDoubleToDoubleFail:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: xxsplti32dx vs34, 0, 1081435463
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; CHECK-LE-NEXT: xxsplti32dx vs34, 1, -1374389535
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; CHECK-LE-NEXT: blr
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;
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; CHECK-NOPCREL-BE-LABEL: testDoubleToDoubleFail:
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; CHECK-NOPCREL-BE: # %bb.0: # %entry
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; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs34, 0, 1081435463
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; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs34, 1, -1374389535
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; CHECK-NOPCREL-BE-NEXT: blr
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;
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; CHECK-NOPCREL-LE-LABEL: testDoubleToDoubleFail:
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; CHECK-NOPCREL-LE: # %bb.0: # %entry
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; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs34, 0, 1081435463
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; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs34, 1, -1374389535
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; CHECK-NOPCREL-LE-NEXT: blr
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;
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; CHECK-NOPREFIX-LABEL: testDoubleToDoubleFail:
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; CHECK-NOPREFIX: # %bb.0: # %entry
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; CHECK-NOPREFIX-NEXT: addis r3, r2, .LCPI0_0@toc@ha
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; CHECK-NOPREFIX-NEXT: addi r3, r3, .LCPI0_0@toc@l
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; CHECK-NOPREFIX-NEXT: lxv vs34, 0(r3)
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; CHECK-NOPREFIX-NEXT: blr
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;
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; CHECK-BE-LABEL: testDoubleToDoubleFail:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: xxsplti32dx vs34, 0, 1081435463
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; CHECK-BE-NEXT: xxsplti32dx vs34, 1, -1374389535
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; CHECK-BE-NEXT: blr
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entry:
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ret <2 x double> <double 3.423300e+02, double 3.423300e+02>
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}
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define dso_local <2 x double> @testFloatDenormToDouble() local_unnamed_addr {
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; CHECK-LE-LABEL: testFloatDenormToDouble:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: xxsplti32dx vs34, 0, 940259579
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; CHECK-LE-NEXT: xxsplti32dx vs34, 1, -2147483648
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; CHECK-LE-NEXT: blr
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;
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; CHECK-NOPCREL-BE-LABEL: testFloatDenormToDouble:
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; CHECK-NOPCREL-BE: # %bb.0: # %entry
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; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs34, 0, 940259579
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; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs34, 1, -2147483648
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; CHECK-NOPCREL-BE-NEXT: blr
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;
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; CHECK-NOPCREL-LE-LABEL: testFloatDenormToDouble:
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; CHECK-NOPCREL-LE: # %bb.0: # %entry
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; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs34, 0, 940259579
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; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs34, 1, -2147483648
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; CHECK-NOPCREL-LE-NEXT: blr
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;
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; CHECK-NOPREFIX-LABEL: testFloatDenormToDouble:
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; CHECK-NOPREFIX: # %bb.0: # %entry
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; CHECK-NOPREFIX-NEXT: addis r3, r2, .LCPI1_0@toc@ha
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; CHECK-NOPREFIX-NEXT: addi r3, r3, .LCPI1_0@toc@l
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; CHECK-NOPREFIX-NEXT: lxv vs34, 0(r3)
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; CHECK-NOPREFIX-NEXT: blr
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;
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; CHECK-BE-LABEL: testFloatDenormToDouble:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: xxsplti32dx vs34, 0, 940259579
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; CHECK-BE-NEXT: xxsplti32dx vs34, 1, -2147483648
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; CHECK-BE-NEXT: blr
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entry:
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ret <2 x double> <double 0x380B38FB80000000, double 0x380B38FB80000000>
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}
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define dso_local <2 x double> @testDoubleToDoubleNaNFail() local_unnamed_addr {
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; CHECK-LE-LABEL: testDoubleToDoubleNaNFail:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: xxsplti32dx vs34, 0, -1
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; CHECK-LE-NEXT: xxsplti32dx vs34, 1, -16
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; CHECK-LE-NEXT: blr
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;
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; CHECK-NOPCREL-BE-LABEL: testDoubleToDoubleNaNFail:
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; CHECK-NOPCREL-BE: # %bb.0: # %entry
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; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs34, 0, -1
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; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs34, 1, -16
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; CHECK-NOPCREL-BE-NEXT: blr
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;
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; CHECK-NOPCREL-LE-LABEL: testDoubleToDoubleNaNFail:
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; CHECK-NOPCREL-LE: # %bb.0: # %entry
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; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs34, 0, -1
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; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs34, 1, -16
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; CHECK-NOPCREL-LE-NEXT: blr
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;
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; CHECK-NOPREFIX-LABEL: testDoubleToDoubleNaNFail:
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; CHECK-NOPREFIX: # %bb.0: # %entry
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; CHECK-NOPREFIX-NEXT: addis r3, r2, .LCPI2_0@toc@ha
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; CHECK-NOPREFIX-NEXT: addi r3, r3, .LCPI2_0@toc@l
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; CHECK-NOPREFIX-NEXT: lxv vs34, 0(r3)
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; CHECK-NOPREFIX-NEXT: blr
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;
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; CHECK-BE-LABEL: testDoubleToDoubleNaNFail:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: xxsplti32dx vs34, 0, -1
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; CHECK-BE-NEXT: xxsplti32dx vs34, 1, -16
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; CHECK-BE-NEXT: blr
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entry:
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ret <2 x double> <double 0xFFFFFFFFFFFFFFF0, double 0xFFFFFFFFFFFFFFF0>
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}
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define dso_local double @testDoubleNonRepresentableScalar() local_unnamed_addr {
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; CHECK-LE-LABEL: testDoubleNonRepresentableScalar:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: xxsplti32dx vs1, 0, 1081435463
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; CHECK-LE-NEXT: xxsplti32dx vs1, 1, -1374389535
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; CHECK-LE-NEXT: blr
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;
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; CHECK-NOPCREL-BE-LABEL: testDoubleNonRepresentableScalar:
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; CHECK-NOPCREL-BE: # %bb.0: # %entry
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; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs1, 0, 1081435463
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; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs1, 1, -1374389535
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; CHECK-NOPCREL-BE-NEXT: blr
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;
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; CHECK-NOPCREL-LE-LABEL: testDoubleNonRepresentableScalar:
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; CHECK-NOPCREL-LE: # %bb.0: # %entry
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; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs1, 0, 1081435463
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; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs1, 1, -1374389535
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; CHECK-NOPCREL-LE-NEXT: blr
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;
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; CHECK-NOPREFIX-LABEL: testDoubleNonRepresentableScalar:
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; CHECK-NOPREFIX: # %bb.0: # %entry
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; CHECK-NOPREFIX-NEXT: addis r3, r2, .LCPI3_0@toc@ha
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; CHECK-NOPREFIX-NEXT: lfd f1, .LCPI3_0@toc@l(r3)
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; CHECK-NOPREFIX-NEXT: blr
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;
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; CHECK-BE-LABEL: testDoubleNonRepresentableScalar:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: xxsplti32dx vs1, 0, 1081435463
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; CHECK-BE-NEXT: xxsplti32dx vs1, 1, -1374389535
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; CHECK-BE-NEXT: blr
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entry:
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ret double 3.423300e+02
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}
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define dso_local float @testFloatDenormScalar() local_unnamed_addr {
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; CHECK-LE-LABEL: testFloatDenormScalar:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: xxsplti32dx vs1, 0, 940259579
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; CHECK-LE-NEXT: xxsplti32dx vs1, 1, -2147483648
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; CHECK-LE-NEXT: blr
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;
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; CHECK-NOPCREL-BE-LABEL: testFloatDenormScalar:
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; CHECK-NOPCREL-BE: # %bb.0: # %entry
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; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs1, 0, 940259579
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; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs1, 1, -2147483648
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; CHECK-NOPCREL-BE-NEXT: blr
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;
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; CHECK-NOPCREL-LE-LABEL: testFloatDenormScalar:
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; CHECK-NOPCREL-LE: # %bb.0: # %entry
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; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs1, 0, 940259579
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; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs1, 1, -2147483648
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; CHECK-NOPCREL-LE-NEXT: blr
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;
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; CHECK-NOPREFIX-LABEL: testFloatDenormScalar:
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; CHECK-NOPREFIX: # %bb.0: # %entry
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; CHECK-NOPREFIX-NEXT: addis r3, r2, .LCPI4_0@toc@ha
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; CHECK-NOPREFIX-NEXT: lfs f1, .LCPI4_0@toc@l(r3)
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; CHECK-NOPREFIX-NEXT: blr
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;
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; CHECK-BE-LABEL: testFloatDenormScalar:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: xxsplti32dx vs1, 0, 940259579
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; CHECK-BE-NEXT: xxsplti32dx vs1, 1, -2147483648
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; CHECK-BE-NEXT: blr
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entry:
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ret float 0x380B38FB80000000
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}
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define dso_local double @testFloatDenormToDoubleScalar() local_unnamed_addr {
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; CHECK-LE-LABEL: testFloatDenormToDoubleScalar:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: xxsplti32dx vs1, 0, 940259579
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; CHECK-LE-NEXT: xxsplti32dx vs1, 1, -2147483648
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; CHECK-LE-NEXT: blr
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;
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; CHECK-NOPCREL-BE-LABEL: testFloatDenormToDoubleScalar:
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; CHECK-NOPCREL-BE: # %bb.0: # %entry
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; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs1, 0, 940259579
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; CHECK-NOPCREL-BE-NEXT: xxsplti32dx vs1, 1, -2147483648
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; CHECK-NOPCREL-BE-NEXT: blr
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;
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; CHECK-NOPCREL-LE-LABEL: testFloatDenormToDoubleScalar:
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; CHECK-NOPCREL-LE: # %bb.0: # %entry
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; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs1, 0, 940259579
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; CHECK-NOPCREL-LE-NEXT: xxsplti32dx vs1, 1, -2147483648
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; CHECK-NOPCREL-LE-NEXT: blr
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;
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; CHECK-NOPREFIX-LABEL: testFloatDenormToDoubleScalar:
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; CHECK-NOPREFIX: # %bb.0: # %entry
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; CHECK-NOPREFIX-NEXT: addis r3, r2, .LCPI5_0@toc@ha
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; CHECK-NOPREFIX-NEXT: lfs f1, .LCPI5_0@toc@l(r3)
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; CHECK-NOPREFIX-NEXT: blr
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;
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; CHECK-BE-LABEL: testFloatDenormToDoubleScalar:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: xxsplti32dx vs1, 0, 940259579
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; CHECK-BE-NEXT: xxsplti32dx vs1, 1, -2147483648
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; CHECK-BE-NEXT: blr
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entry:
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ret double 0x380B38FB80000000
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}
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