This PR continues https://github.com/llvm/llvm-project/pull/101732 changes in virtual register processing aimed to improve correctness of emitted MIR between passes from the perspective of MachineVerifier. Namely, the following changes are introduced: * register classes (lib/Target/SPIRV/SPIRVRegisterInfo.td) and instruction patterns (lib/Target/SPIRV/SPIRVInstrInfo.td) are corrected and simplified (by removing unnecessary sophisticated options) -- e.g., this PR gets rid of duplicating 32/64 bits patterns, removes ANYID register class and simplifies definition of the rest of register classes, * hardcoded LLT scalar types in passes before instruction selection are corrected -- the goal is to have correct bit width before instruction selection, and use 64 bits registers for pattern matching in the instruction selection pass; 32-bit registers remain where they are described in such terms by SPIR-V specification (like, for example, creation of virtual registers for scope/mem semantics operands), * rework virtual register type/class assignment for calls/builtins lowering, * a series of minor changes to fix validity of emitted code between passes: - ensure that that bitcast changes the type, - fix the pattern for instruction selection for OpExtInst, - simplify inline asm operands usage, - account for arbitrary integer sizes / update legalizer rules; * add '-verify-machineinstrs' to existed test cases. See also https://github.com/llvm/llvm-project/issues/88129 that this PR may resolve. This PR fixes a great number of issues reported by MachineVerifier and, as a result, reduces a number of failed test cases for the mode with expensive checks set on from ~200 to ~57.
40 lines
1.4 KiB
LLVM
40 lines
1.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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@global = addrspace(1) constant i32 1 ; OpenCL global memory
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@constant = addrspace(2) constant i32 2 ; OpenCL constant memory
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@local = addrspace(3) constant i32 3 ; OpenCL local memory
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define i32 @getGlobal1() {
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%g = load i32, i32 addrspace(1)* @global
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ret i32 %g
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}
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define i32 @getGlobal2() {
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%g = load i32, i32 addrspace(2)* @constant
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ret i32 %g
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}
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define i32 @getGlobal3() {
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%g = load i32, i32 addrspace(3)* @local
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ret i32 %g
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}
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; CHECK: [[INT:%.+]] = OpTypeInt 32
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; CHECK-DAG: [[PTR_TO_INT_AS1:%.+]] = OpTypePointer CrossWorkgroup [[INT]]
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; CHECK-DAG: [[PTR_TO_INT_AS2:%.+]] = OpTypePointer UniformConstant [[INT]]
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; CHECK-DAG: [[PTR_TO_INT_AS3:%.+]] = OpTypePointer Workgroup [[INT]]
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; CHECK-DAG: [[CST_AS1:%.+]] = OpConstant [[INT]] 1
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; CHECK-DAG: [[CST_AS2:%.+]] = OpConstant [[INT]] 2
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; CHECK-DAG: [[CST_AS3:%.+]] = OpConstant [[INT]] 3
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; CHECK-DAG: [[GV1:%.+]] = OpVariable [[PTR_TO_INT_AS1]] CrossWorkgroup [[CST_AS1]]
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; CHECK-DAG: [[GV2:%.+]] = OpVariable [[PTR_TO_INT_AS2]] UniformConstant [[CST_AS2]]
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; CHECK-DAG: [[GV3:%.+]] = OpVariable [[PTR_TO_INT_AS3]] Workgroup [[CST_AS3]]
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; CHECK: OpLoad [[INT]] [[GV1]]
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; CHECK: OpLoad [[INT]] [[GV2]]
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; CHECK: OpLoad [[INT]] [[GV3]]
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