f0b3b6d15b
Alter both isConstantIntBuildVectorOrConstantInt + isConstantFPBuildVectorOrConstantFP to return a bool instead of the underlying SDNode, and adjust usage to account for this.
Update isConstantIntBuildVectorOrConstantInt to peek though bitcasts when attempting to find a constant, in particular this improves canonicalization of constants to the RHS on commutable instructions.
X86 is the beneficiary here as it often bitcasts rematerializable 0/-1 vector constants as vXi32 and bitcasts to the requested type
Minor cleanup that helps with #107423
Reapplied after regression fix ba1255def6
263 lines
9.0 KiB
LLVM
263 lines
9.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64
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define <4 x i64> @test_vpaddq(<4 x i64> %i, <4 x i64> %j) nounwind readnone {
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; CHECK-LABEL: test_vpaddq:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpaddq %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%x = add <4 x i64> %i, %j
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ret <4 x i64> %x
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}
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define <8 x i32> @test_vpaddd(<8 x i32> %i, <8 x i32> %j) nounwind readnone {
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; CHECK-LABEL: test_vpaddd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpaddd %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%x = add <8 x i32> %i, %j
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ret <8 x i32> %x
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}
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define <16 x i16> @test_vpaddw(<16 x i16> %i, <16 x i16> %j) nounwind readnone {
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; CHECK-LABEL: test_vpaddw:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpaddw %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%x = add <16 x i16> %i, %j
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ret <16 x i16> %x
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}
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define <32 x i8> @test_vpaddb(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
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; CHECK-LABEL: test_vpaddb:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpaddb %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%x = add <32 x i8> %i, %j
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ret <32 x i8> %x
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}
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define <4 x i64> @test_vpsubq(<4 x i64> %i, <4 x i64> %j) nounwind readnone {
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; CHECK-LABEL: test_vpsubq:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpsubq %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%x = sub <4 x i64> %i, %j
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ret <4 x i64> %x
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}
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define <8 x i32> @test_vpsubd(<8 x i32> %i, <8 x i32> %j) nounwind readnone {
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; CHECK-LABEL: test_vpsubd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpsubd %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%x = sub <8 x i32> %i, %j
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ret <8 x i32> %x
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}
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define <16 x i16> @test_vpsubw(<16 x i16> %i, <16 x i16> %j) nounwind readnone {
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; CHECK-LABEL: test_vpsubw:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpsubw %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%x = sub <16 x i16> %i, %j
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ret <16 x i16> %x
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}
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define <32 x i8> @test_vpsubb(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
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; CHECK-LABEL: test_vpsubb:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpsubb %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%x = sub <32 x i8> %i, %j
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ret <32 x i8> %x
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}
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define <8 x i32> @test_vpmulld(<8 x i32> %i, <8 x i32> %j) nounwind readnone {
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; CHECK-LABEL: test_vpmulld:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpmulld %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%x = mul <8 x i32> %i, %j
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ret <8 x i32> %x
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}
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define <16 x i16> @test_vpmullw(<16 x i16> %i, <16 x i16> %j) nounwind readnone {
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; CHECK-LABEL: test_vpmullw:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpmullw %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%x = mul <16 x i16> %i, %j
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ret <16 x i16> %x
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}
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define <16 x i8> @mul_v16i8(<16 x i8> %i, <16 x i8> %j) nounwind readnone {
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; X86-LABEL: mul_v16i8:
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; X86: # %bb.0:
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; X86-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
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; X86-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
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; X86-NEXT: vpmullw %ymm1, %ymm0, %ymm0
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; X86-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0
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; X86-NEXT: vextracti128 $1, %ymm0, %xmm1
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; X86-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
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; X86-NEXT: vzeroupper
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; X86-NEXT: retl
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;
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; X64-LABEL: mul_v16i8:
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; X64: # %bb.0:
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; X64-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
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; X64-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
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; X64-NEXT: vpmullw %ymm1, %ymm0, %ymm0
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; X64-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
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; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
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; X64-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
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; X64-NEXT: vzeroupper
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; X64-NEXT: retq
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%x = mul <16 x i8> %i, %j
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ret <16 x i8> %x
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}
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define <32 x i8> @mul_v32i8(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
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; CHECK-LABEL: mul_v32i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpbroadcastw {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
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; CHECK-NEXT: vpand %ymm2, %ymm1, %ymm3
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; CHECK-NEXT: vpmaddubsw %ymm3, %ymm0, %ymm3
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; CHECK-NEXT: vpand %ymm2, %ymm3, %ymm3
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; CHECK-NEXT: vpandn %ymm1, %ymm2, %ymm1
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; CHECK-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: vpsllw $8, %ymm0, %ymm0
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; CHECK-NEXT: vpor %ymm0, %ymm3, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%x = mul <32 x i8> %i, %j
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ret <32 x i8> %x
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}
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define <4 x i64> @mul_v4i64(<4 x i64> %i, <4 x i64> %j) nounwind readnone {
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; CHECK-LABEL: mul_v4i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpsrlq $32, %ymm0, %ymm2
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; CHECK-NEXT: vpmuludq %ymm1, %ymm2, %ymm2
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; CHECK-NEXT: vpsrlq $32, %ymm1, %ymm3
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; CHECK-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
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; CHECK-NEXT: vpaddq %ymm2, %ymm3, %ymm2
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; CHECK-NEXT: vpsllq $32, %ymm2, %ymm2
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; CHECK-NEXT: vpmuludq %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: vpaddq %ymm2, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%x = mul <4 x i64> %i, %j
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ret <4 x i64> %x
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}
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define <8 x i32> @mul_const1(<8 x i32> %x) {
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; CHECK-LABEL: mul_const1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpaddd %ymm0, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%y = mul <8 x i32> %x, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
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ret <8 x i32> %y
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}
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define <4 x i64> @mul_const2(<4 x i64> %x) {
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; CHECK-LABEL: mul_const2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpsllq $2, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%y = mul <4 x i64> %x, <i64 4, i64 4, i64 4, i64 4>
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ret <4 x i64> %y
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}
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define <16 x i16> @mul_const3(<16 x i16> %x) {
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; CHECK-LABEL: mul_const3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpsllw $3, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%y = mul <16 x i16> %x, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
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ret <16 x i16> %y
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}
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define <4 x i64> @mul_const4(<4 x i64> %x) {
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; CHECK-LABEL: mul_const4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vpsubq %ymm0, %ymm1, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%y = mul <4 x i64> %x, <i64 -1, i64 -1, i64 -1, i64 -1>
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ret <4 x i64> %y
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}
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define <8 x i32> @mul_const5(<8 x i32> %x) {
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; CHECK-LABEL: mul_const5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%y = mul <8 x i32> %x, <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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ret <8 x i32> %y
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}
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define <8 x i32> @mul_const6(<8 x i32> %x) {
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; X86-LABEL: mul_const6:
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; X86: # %bb.0:
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; X86-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: mul_const6:
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; X64: # %bb.0:
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; X64-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
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; X64-NEXT: retq
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%y = mul <8 x i32> %x, <i32 0, i32 0, i32 0, i32 2, i32 0, i32 2, i32 0, i32 0>
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ret <8 x i32> %y
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}
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define <8 x i64> @mul_const7(<8 x i64> %x) {
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; CHECK-LABEL: mul_const7:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpaddq %ymm0, %ymm0, %ymm0
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; CHECK-NEXT: vpaddq %ymm1, %ymm1, %ymm1
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; CHECK-NEXT: ret{{[l|q]}}
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%y = mul <8 x i64> %x, <i64 2, i64 2, i64 2, i64 2, i64 2, i64 2, i64 2, i64 2>
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ret <8 x i64> %y
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}
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define <8 x i16> @mul_const8(<8 x i16> %x) {
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; CHECK-LABEL: mul_const8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpsllw $3, %xmm0, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%y = mul <8 x i16> %x, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
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ret <8 x i16> %y
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}
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define <8 x i32> @mul_const9(<8 x i32> %x) {
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; CHECK-LABEL: mul_const9:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpmovsxbq {{.*#+}} xmm1 = [2,0]
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; CHECK-NEXT: vpmulld %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%y = mul <8 x i32> %x, <i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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ret <8 x i32> %y
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}
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; ptr 0x01010101
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define <4 x i32> @mul_const10(<4 x i32> %x) {
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; CHECK-LABEL: mul_const10:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpbroadcastd {{.*#+}} xmm1 = [16843009,16843009,16843009,16843009]
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; CHECK-NEXT: vpmulld %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%m = mul <4 x i32> %x, <i32 16843009, i32 16843009, i32 16843009, i32 16843009>
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ret <4 x i32> %m
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}
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; ptr 0x80808080
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define <4 x i32> @mul_const11(<4 x i32> %x) {
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; CHECK-LABEL: mul_const11:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2155905152,2155905152,2155905152,2155905152]
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; CHECK-NEXT: vpmulld %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%m = mul <4 x i32> %x, <i32 2155905152, i32 2155905152, i32 2155905152, i32 2155905152>
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ret <4 x i32> %m
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}
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