e6bf48d110
As of revea222be0d, LLVMs assembler will actually try to honour the "fill value" part of p2align directives. X86 printed these as 0x90, which isn't actually what it wanted: we want multi-byte nops for .text padding. Compiling via a textual assembly file produces single-byte nop padding sinceea222be0dbut the built-in assembler will produce multi-byte nops. This divergent behaviour is undesirable. To fix: don't set the byte padding field for x86, which allows the assembler to pick multi-byte nops. Test that we get the same multi-byte padding when compiled via textual assembly or directly to object file. Added same-align-bytes-with-llasm-llobj.ll to that effect, updated numerous other tests to not contain check-lines for the explicit padding.
68 lines
2.4 KiB
LLVM
68 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -relocation-model=static -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
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; The inner loop should require only one add (and no leas either).
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; rdar://8100380
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@flags = external dso_local global [8192 x i8], align 16 ; <ptr> [#uses=1]
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define void @foo() nounwind {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl $2, %eax
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB0_1: # %bb7
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; CHECK-NEXT: # =>This Loop Header: Depth=1
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; CHECK-NEXT: # Child Loop BB0_2 Depth 2
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; CHECK-NEXT: movl $2, %ecx
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB0_2: # %bb11
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; CHECK-NEXT: # Parent Loop BB0_1 Depth=1
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; CHECK-NEXT: # => This Inner Loop Header: Depth=2
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; CHECK-NEXT: movb $0, flags(%rcx)
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; CHECK-NEXT: addq %rax, %rcx
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; CHECK-NEXT: cmpq $8192, %rcx # imm = 0x2000
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; CHECK-NEXT: jl .LBB0_2
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; CHECK-NEXT: # %bb.3: # %bb16
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; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
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; CHECK-NEXT: incq %rax
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; CHECK-NEXT: cmpq $8192, %rax # imm = 0x2000
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; CHECK-NEXT: jl .LBB0_1
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; CHECK-NEXT: # %bb.4: # %bb20
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; CHECK-NEXT: retq
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entry:
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br label %bb
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bb: ; preds = %entry
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br label %bb7
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bb7: ; preds = %bb, %bb17
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%tmp8 = phi i64 [ %tmp18, %bb17 ], [ 2, %bb ] ; <i64> [#uses=2]
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br label %bb10
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bb10: ; preds = %bb7
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br label %bb11
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bb11: ; preds = %bb10, %bb11
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%tmp12 = phi i64 [ %tmp14, %bb11 ], [ 2, %bb10 ] ; <i64> [#uses=2]
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%tmp13 = getelementptr inbounds [8192 x i8], ptr @flags, i64 0, i64 %tmp12 ; <ptr> [#uses=1]
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store i8 0, ptr %tmp13, align 1
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%tmp14 = add nsw i64 %tmp12, %tmp8 ; <i64> [#uses=2]
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%tmp15 = icmp slt i64 %tmp14, 8192 ; <i1> [#uses=1]
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br i1 %tmp15, label %bb11, label %bb16
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bb16: ; preds = %bb11
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br label %bb17
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bb17: ; preds = %bb16, %bb7
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%tmp18 = add nsw i64 %tmp8, 1 ; <i64> [#uses=2]
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%tmp19 = icmp slt i64 %tmp18, 8192 ; <i1> [#uses=1]
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br i1 %tmp19, label %bb7, label %bb20
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bb20: ; preds = %bb17
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br label %bb21
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bb21: ; preds = %bb20, %entry
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ret void
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}
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