b7e4fba6e5
After #98505, the textual IR keyword `x86_mmx` was temporarily made to parse as `<1 x i64>`, so as not to require a lot of test update noise. This completes the removal of the type, by removing the`x86_mmx` keyword from the IR parser, and making the (now no-op) test updates via `sed -i 's/\bx86_mmx\b/<1 x i64>/g' $(git grep -l x86_mmx llvm/test/)`. Resulting bitcasts from <1 x i64> to itself were then manually deleted. Changes to llvm/test/Bitcode/compatibility-$VERSION.ll were reverted, as they're intended to be equivalent to the .bc file, if parsed by old LLVM, so shouldn't be updated. A few tests were removed, as they're no longer testing anything, in the following files: - llvm/test/Transforms/GlobalOpt/x86_mmx_load.ll - llvm/test/Transforms/InstCombine/cast.ll - llvm/test/Transforms/InstSimplify/ConstProp/gep-zeroinit-vector.ll Works towards issue #98272.
28 lines
862 B
LLVM
28 lines
862 B
LLVM
; RUN: llc < %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
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target triple = "i386-apple-macosx10.7.0"
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define void @_Z17FilterYUVRows_MMXi(i32 %af) nounwind ssp {
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entry:
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%aMyAlloca = alloca i32, align 32
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%dest = alloca <1 x i64>, align 32
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%a32 = load i32, ptr %aMyAlloca, align 4
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%aconv = trunc i32 %a32 to i16
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%a36 = insertelement <4 x i16> undef, i16 %aconv, i32 0
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%a37 = insertelement <4 x i16> %a36, i16 %aconv, i32 1
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%a38 = insertelement <4 x i16> %a37, i16 %aconv, i32 2
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%a39 = insertelement <4 x i16> %a38, i16 %aconv, i32 3
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%a40 = bitcast <4 x i16> %a39 to <1 x i64>
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%a47 = trunc i32 %a32 to i1
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br i1 %a47, label %a48, label %a49
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a48:
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unreachable
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a49:
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store <1 x i64> %a40, ptr %dest, align 8 ; !!!
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ret void
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}
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