As of revea222be0d, LLVMs assembler will actually try to honour the "fill value" part of p2align directives. X86 printed these as 0x90, which isn't actually what it wanted: we want multi-byte nops for .text padding. Compiling via a textual assembly file produces single-byte nop padding sinceea222be0dbut the built-in assembler will produce multi-byte nops. This divergent behaviour is undesirable. To fix: don't set the byte padding field for x86, which allows the assembler to pick multi-byte nops. Test that we get the same multi-byte padding when compiled via textual assembly or directly to object file. Added same-align-bytes-with-llasm-llobj.ll to that effect, updated numerous other tests to not contain check-lines for the explicit padding.
40 lines
1.2 KiB
LLVM
40 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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define i32 @foo(ptr nocapture %perm, i32 %n) {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: movaps {{.*#+}} xmm0 = [0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0]
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: andl $1, %ecx
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; CHECK-NEXT: movaps {{.*#+}} xmm1 = [2,3]
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB0_1: # %body
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq -24(%rsp,%rcx,8), %rdx
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; CHECK-NEXT: movups %xmm0, (%rdi,%rdx,8)
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; CHECK-NEXT: testq %rdx, %rdx
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: jne .LBB0_1
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; CHECK-NEXT: # %bb.2: # %exit
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; CHECK-NEXT: retq
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entry:
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br label %body
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body:
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%vec.ind = phi <2 x i64> [ <i64 0, i64 1>, %entry ], [ <i64 2, i64 3>, %body ]
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%l13 = extractelement <2 x i64> %vec.ind, i32 %n
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%l14 = getelementptr inbounds i64, ptr %perm, i64 %l13
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store <2 x i64> %vec.ind, ptr %l14, align 8
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%niter.ncmp.3 = icmp eq i64 %l13, 0
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br i1 %niter.ncmp.3, label %exit, label %body
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exit:
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ret i32 %n
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}
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