cc8fdd60c2
This patch implements lowering of the GlobalAddress, BlockAddress, JumpTable and BR_JT. Also patch adds legal support of the BR_CC operation for i32 type.
33 lines
905 B
LLVM
33 lines
905 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=xtensa -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=XTENSA %s
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define i32 @indirectbr(i8* %target) nounwind {
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; XTENSA-LABEL: indirectbr:
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; XTENSA: jx a2
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; XTENSA-NEXT: .LBB0_1: # %test_label
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; XTENSA-NEXT: movi a2, 0
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; XTENSA-NEXT: ret
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indirectbr i8* %target, [label %test_label]
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test_label:
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br label %ret
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ret:
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ret i32 0
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}
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define i32 @indirectbr_with_offset(i8* %a) nounwind {
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; XTENSA-LABEL: indirectbr_with_offset:
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; XTENSA: movi a8, 1380
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; XTENSA-NEXT: add a8, a2, a8
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; XTENSA-NEXT: jx a8
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; XTENSA-NEXT: .LBB1_1: # %test_label
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; XTENSA-NEXT: movi a2, 0
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; XTENSA-NEXT: ret
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%target = getelementptr inbounds i8, i8* %a, i32 1380
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indirectbr i8* %target, [label %test_label]
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test_label:
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br label %ret
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ret:
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ret i32 0
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}
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