8516f54e6a
This is a mostly-target-independent variadic function optimisation and lowering pass. It is only enabled for AMDGPU in this initial commit. The purpose is to make C style variadic functions a zero cost abstraction. They are lowered to equivalent IR which is then amenable to other optimisations. This is inherently slightly target specific but much less so than one might expect - the C varargs interface heavily constrains the ABI design divergence. The pass is primarily tested from webassembly. This is because wasm has a straightforward variadic lowering strategy which coincides exactly with what this pass transforms code into and a struct passing convention with few cases to check. Adding further targets conventions is straightforward and elided from this patch primarily to simplify the review. Implemented in other branches are Linux X86, AMD64, AArch64 and NVPTX. Testing for targets that have existing lowering for va_arg from clang is most efficiently done by checking that clang | opt completely elides the variadic syntax from test cases. The lowering produces a struct for each call site which can be inspected to check the various alignment and indirections are correct. AMDGPU presently has no variadic support other than some ad hoc printf handling. Combined with the pass being inactive on all other targets landing this represents strict increase in capability with zero risk. Testing and refining will continue post commit. In addition to the compiler tests included here, a self contained x64 clang/musl toolchain was constructed using the "lowering" instead of the systemv ABI and used to build various C programs like lua and libxml2.
121 lines
4.8 KiB
LLVM
121 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -mtriple=wasm32-unknown-unknown -S --passes=expand-variadics --expand-variadics-override=optimize < %s | FileCheck %s -check-prefixes=CHECK,OPT
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; RUN: opt -mtriple=wasm32-unknown-unknown -S --passes=expand-variadics --expand-variadics-override=lowering < %s | FileCheck %s -check-prefixes=CHECK,ABI
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; REQUIRES: webassembly-registered-target
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declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
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declare void @llvm.va_copy.p0(ptr, ptr)
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declare void @valist(ptr noundef)
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declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
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declare void @llvm.va_start.p0(ptr)
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declare void @llvm.va_end.p0(ptr)
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define void @start_once(...) {
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; OPT-LABEL: @start_once(
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; OPT-NEXT: entry:
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; OPT-NEXT: [[VA_START:%.*]] = alloca ptr, align 4
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; OPT-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr [[VA_START]])
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; OPT-NEXT: call void @llvm.va_start.p0(ptr [[VA_START]])
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; OPT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VA_START]], align 4
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; OPT-NEXT: call void @start_once.valist(ptr [[TMP0]])
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; OPT-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[VA_START]])
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; OPT-NEXT: ret void
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;
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; ABI-LABEL: @start_once(
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; ABI-NEXT: entry:
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; ABI-NEXT: [[S:%.*]] = alloca ptr, align 4
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; ABI-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[S]])
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; ABI-NEXT: store ptr [[VARARGS:%.*]], ptr [[S]], align 4
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; ABI-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S]], align 4
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; ABI-NEXT: call void @valist(ptr noundef [[TMP0]])
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; ABI-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[S]])
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; ABI-NEXT: ret void
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;
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entry:
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%s = alloca ptr, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %s)
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call void @llvm.va_start.p0(ptr nonnull %s)
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%0 = load ptr, ptr %s, align 4
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call void @valist(ptr noundef %0)
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call void @llvm.va_end.p0(ptr %s)
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %s)
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ret void
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}
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define void @start_twice(...) {
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; OPT-LABEL: @start_twice(
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; OPT-NEXT: entry:
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; OPT-NEXT: [[VA_START:%.*]] = alloca ptr, align 4
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; OPT-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr [[VA_START]])
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; OPT-NEXT: call void @llvm.va_start.p0(ptr [[VA_START]])
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; OPT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VA_START]], align 4
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; OPT-NEXT: call void @start_twice.valist(ptr [[TMP0]])
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; OPT-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[VA_START]])
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; OPT-NEXT: ret void
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;
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; ABI-LABEL: @start_twice(
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; ABI-NEXT: entry:
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; ABI-NEXT: [[S0:%.*]] = alloca ptr, align 4
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; ABI-NEXT: [[S1:%.*]] = alloca ptr, align 4
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; ABI-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[S0]])
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; ABI-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[S1]])
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; ABI-NEXT: store ptr [[VARARGS:%.*]], ptr [[S0]], align 4
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; ABI-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S0]], align 4
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; ABI-NEXT: call void @valist(ptr noundef [[TMP0]])
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; ABI-NEXT: store ptr [[VARARGS]], ptr [[S1]], align 4
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; ABI-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S1]], align 4
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; ABI-NEXT: call void @valist(ptr noundef [[TMP1]])
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; ABI-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[S1]])
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; ABI-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[S0]])
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; ABI-NEXT: ret void
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;
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entry:
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%s0 = alloca ptr, align 4
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%s1 = alloca ptr, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %s0)
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %s1)
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call void @llvm.va_start.p0(ptr nonnull %s0)
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%0 = load ptr, ptr %s0, align 4
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call void @valist(ptr noundef %0)
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call void @llvm.va_end.p0(ptr %s0)
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call void @llvm.va_start.p0(ptr nonnull %s1)
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%1 = load ptr, ptr %s1, align 4
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call void @valist(ptr noundef %1)
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call void @llvm.va_end.p0(ptr %s1)
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %s1)
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %s0)
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ret void
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}
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define void @copy(ptr noundef %va) {
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; CHECK-LABEL: @copy(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VA_ADDR:%.*]] = alloca ptr, align 4
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; CHECK-NEXT: [[CP:%.*]] = alloca ptr, align 4
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; CHECK-NEXT: store ptr [[VA:%.*]], ptr [[VA_ADDR]], align 4
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[CP]])
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; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr [[CP]], ptr [[VA_ADDR]], i32 4, i1 false)
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; CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CP]], align 4
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; CHECK-NEXT: call void @valist(ptr noundef [[TMP0]])
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[CP]])
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; CHECK-NEXT: ret void
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;
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entry:
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%va.addr = alloca ptr, align 4
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%cp = alloca ptr, align 4
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store ptr %va, ptr %va.addr, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %cp)
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call void @llvm.va_copy.p0(ptr nonnull %cp, ptr nonnull %va.addr)
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%0 = load ptr, ptr %cp, align 4
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call void @valist(ptr noundef %0)
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %cp)
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ret void
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}
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