d9a5aa8e2d
Change all the cstval_pred_ty based PatternMatch helpers (things like m_AllOnes and m_Zero) to only allow poison elements inside vector splats, not undef elements. Historically, we used to represent non-demanded elements in vectors using undef. Nowadays, we use poison instead. As such, I believe that support for undef in vector splats is no longer useful. At the same time, while poison splat elements are pretty much always safe to ignore, this is not generally the case for undef elements. We have existing miscompiles in our tests due to this (see the masked-merge-*.ll tests changed here) and it's easy to miss such cases in the future, now that we write tests using poison instead of undef elements. I think overall, keeping support for undef elements no longer makes sense, and we should drop it. Once this is done consistently, I think we may also consider allowing poison in m_APInt by default, as doing that change is much less risky than doing the same with undef. This change involves a substantial amount of test changes. For most tests, I've just replaced undef with poison, as I don't think there is value in retaining both. For some tests (where the distinction between undef and poison is important), I've duplicated tests.
119 lines
3.3 KiB
LLVM
119 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; Test for (x & y) + ~(x | y) -> ~(x ^ y)
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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; (x & y) + ~(x | y)
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define i32 @src(i32 noundef %0, i32 noundef %1) {
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; CHECK-LABEL: @src(
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; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1:%.*]], [[TMP0:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], -1
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; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%3 = and i32 %1, %0
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%4 = or i32 %1, %0
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%5 = xor i32 %4, -1
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%6 = add i32 %3, %5
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ret i32 %6
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}
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; vector version of src
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define <2 x i32> @src_vec(<2 x i32> noundef %0, <2 x i32> noundef %1) {
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; CHECK-LABEL: @src_vec(
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; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i32> [[TMP1:%.*]], [[TMP0:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = xor <2 x i32> [[TMP3]], <i32 -1, i32 -1>
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; CHECK-NEXT: ret <2 x i32> [[TMP4]]
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;
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%3 = and <2 x i32> %1, %0
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%4 = or <2 x i32> %1, %0
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%5 = xor <2 x i32> %4, <i32 -1, i32 -1>
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%6 = add <2 x i32> %3, %5
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ret <2 x i32> %6
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}
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; vector version of src with poison values
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define <2 x i32> @src_vec_poison(<2 x i32> noundef %0, <2 x i32> noundef %1) {
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; CHECK-LABEL: @src_vec_poison(
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; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i32> [[TMP1:%.*]], [[TMP0:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = xor <2 x i32> [[TMP3]], <i32 -1, i32 -1>
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; CHECK-NEXT: ret <2 x i32> [[TMP4]]
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;
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%3 = and <2 x i32> %1, %0
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%4 = or <2 x i32> %1, %0
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%5 = xor <2 x i32> %4, <i32 -1, i32 poison>
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%6 = add <2 x i32> %3, %5
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ret <2 x i32> %6
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}
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; (x & y) + ~(y | x)
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define i32 @src2(i32 noundef %0, i32 noundef %1) {
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; CHECK-LABEL: @src2(
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; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1:%.*]], [[TMP0:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], -1
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; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%3 = and i32 %1, %0
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%4 = or i32 %0, %1
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%5 = xor i32 %4, -1
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%6 = add i32 %3, %5
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ret i32 %6
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}
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; (x & y) + (~x & ~y)
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define i32 @src3(i32 noundef %0, i32 noundef %1) {
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; CHECK-LABEL: @src3(
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; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1:%.*]], [[TMP0:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], -1
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; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%3 = and i32 %1, %0
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%4 = xor i32 %0, -1
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%5 = xor i32 %1, -1
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%6 = and i32 %4, %5
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%7 = add i32 %3, %6
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ret i32 %7
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}
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; ~(x | y) + (y & x)
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define i32 @src4(i32 noundef %0, i32 noundef %1) {
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; CHECK-LABEL: @src4(
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; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0:%.*]], [[TMP1:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], -1
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; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%3 = and i32 %0, %1
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%4 = or i32 %1, %0
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%5 = xor i32 %4, -1
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%6 = add i32 %3, %5
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ret i32 %6
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}
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; ~(x | y) + (x & y)
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define i32 @src5(i32 noundef %0, i32 noundef %1) {
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; CHECK-LABEL: @src5(
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; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1:%.*]], [[TMP0:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], -1
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; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%3 = or i32 %1, %0
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%4 = xor i32 %3, -1
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%5 = and i32 %1, %0
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%6 = add i32 %4, %5
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ret i32 %6
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}
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; (a & b) + ~(c | d)
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define i32 @src6(i32 %0, i32 %1, i32 %2, i32 %3) {
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; CHECK-LABEL: @src6(
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; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0:%.*]], [[TMP1:%.*]]
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; CHECK-NEXT: [[TMP6:%.*]] = or i32 [[TMP2:%.*]], [[TMP3:%.*]]
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; CHECK-NEXT: [[TMP7:%.*]] = xor i32 [[TMP6]], -1
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; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP5]], [[TMP7]]
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; CHECK-NEXT: ret i32 [[TMP8]]
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;
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%5 = and i32 %0, %1
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%6 = or i32 %2, %3
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%7 = xor i32 %6, -1
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%8 = add i32 %5, %7
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ret i32 %8
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}
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