094572701d
This patch makes the final major change of the RemoveDIs project, changing the default IR output from debug intrinsics to debug records. This is expected to break a large number of tests: every single one that tests for uses or declarations of debug intrinsics and does not explicitly disable writing records. If this patch has broken your downstream tests (or upstream tests on a configuration I wasn't able to run): 1. If you need to immediately unblock a build, pass `--write-experimental-debuginfo=false` to LLVM's option processing for all failing tests (remember to use `-mllvm` for clang/flang to forward arguments to LLVM). 2. For most test failures, the changes are trivial and mechanical, enough that they can be done by script; see the migration guide for a guide on how to do this: https://llvm.org/docs/RemoveDIsDebugInfo.html#test-updates 3. If any tests fail for reasons other than FileCheck check lines that need updating, such as assertion failures, that is most likely a real bug with this patch and should be reported as such. For more information, see the recent PSA: https://discourse.llvm.org/t/psa-ir-output-changing-from-debug-intrinsics-to-debug-records/79578
94 lines
5.0 KiB
LLVM
94 lines
5.0 KiB
LLVM
; RUN: opt -S -loop-reduce %s -o - | FileCheck %s
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; RUN: opt --try-experimental-debuginfo-iterators -S -loop-reduce %s -o - | FileCheck %s
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; REQUIRES: x86-registered-target
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;; Ensure that we retain debuginfo for the induction variable and dependant
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;; variables when loop strength reduction is applied to the loop.
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;; This IR produced from:
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;;
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;; clang -S -emit-llvm -Xclang -disable-llvm-passes -g lsr-basic.cpp -o
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;; Then executing opt -O2 up to the the loopFullUnroll pass.
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;; void mul_pow_of_2_to_shift(unsigned size, unsigned *data) {
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;; unsigned i = 0;
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;; #pragma clang loop vectorize(disable)
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;; while (i < size) {
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;; unsigned comp = i * 8;
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;; data[i] = comp;
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;; i++; // DexLabel('mul_pow_of_2_induction_increment')
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;; }
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;; }
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; CHECK: #dbg_value(i64 %lsr.iv, ![[i:[0-9]+]], !DIExpression(DW_OP_consts, 8, DW_OP_div, DW_OP_stack_value),
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; CHECK: #dbg_value(i64 %lsr.iv, ![[comp:[0-9]+]], !DIExpression(DW_OP_consts, 8, DW_OP_div, DW_OP_consts, 8, DW_OP_mul, DW_OP_stack_value),
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; CHECK: #dbg_value(i64 %lsr.iv, ![[i]], !DIExpression(DW_OP_consts, 8, DW_OP_div, DW_OP_consts, 1, DW_OP_plus, DW_OP_stack_value),
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; CHECK: ![[i]] = !DILocalVariable(name: "i"
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; CHECK: ![[comp]] = !DILocalVariable(name: "comp"
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define dso_local void @_Z21mul_pow_of_2_to_shiftjPj(i32 %size, ptr nocapture %data) local_unnamed_addr !dbg !7 {
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entry:
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call void @llvm.dbg.value(metadata i32 %size, metadata !12, metadata !DIExpression()), !dbg !13
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call void @llvm.dbg.value(metadata ptr %data, metadata !14, metadata !DIExpression()), !dbg !13
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call void @llvm.dbg.value(metadata i32 0, metadata !15, metadata !DIExpression()), !dbg !13
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%cmp4.not = icmp eq i32 %size, 0, !dbg !13
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br i1 %cmp4.not, label %while.end, label %while.body.preheader, !dbg !13
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while.body.preheader: ; preds = %entry
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%wide.trip.count = zext i32 %size to i64, !dbg !13
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br label %while.body, !dbg !13
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while.body: ; preds = %while.body, %while.body.preheader
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%indvars.iv = phi i64 [ 0, %while.body.preheader ], [ %indvars.iv.next, %while.body ]
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call void @llvm.dbg.value(metadata i64 %indvars.iv, metadata !15, metadata !DIExpression()), !dbg !13
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%0 = trunc i64 %indvars.iv to i32, !dbg !16
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%mul = shl i32 %0, 3, !dbg !16
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call void @llvm.dbg.value(metadata i32 %mul, metadata !18, metadata !DIExpression()), !dbg !16
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%arrayidx = getelementptr inbounds i32, ptr %data, i64 %indvars.iv, !dbg !16
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store i32 %mul, ptr %arrayidx, align 4, !dbg !16
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1, !dbg !16
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call void @llvm.dbg.value(metadata i64 %indvars.iv.next, metadata !15, metadata !DIExpression()), !dbg !13
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%exitcond = icmp ne i64 %indvars.iv.next, %wide.trip.count, !dbg !13
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br i1 %exitcond, label %while.body, label %while.end.loopexit, !dbg !13, !llvm.loop !19
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while.end.loopexit: ; preds = %while.body
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br label %while.end, !dbg !13
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while.end: ; preds = %while.end.loopexit, %entry
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ret void, !dbg !13
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}
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; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
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declare void @llvm.dbg.value(metadata, metadata, metadata) #0
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attributes #0 = { nofree nosync nounwind readnone speculatable willreturn }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3, !4, !5}
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!llvm.ident = !{!6}
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!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, producer: "clang version 13.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
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!1 = !DIFile(filename: "lsr-basic.cpp", directory: "/tmp")
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!2 = !{}
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!3 = !{i32 7, !"Dwarf Version", i32 4}
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!4 = !{i32 2, !"Debug Info Version", i32 3}
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!5 = !{i32 1, !"wchar_size", i32 4}
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!6 = !{!"clang version 13.0.0"}
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!7 = distinct !DISubprogram(name: "mul_pow_of_2_to_shift", linkageName: "_Z21mul_pow_of_2_to_shiftjPj", scope: !1, file: !1, line: 18, type: !8, scopeLine: 18, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2)
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!8 = !DISubroutineType(types: !9)
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!9 = !{null, !10, !11}
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!10 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
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!11 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !10, size: 64)
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!12 = !DILocalVariable(name: "size", arg: 1, scope: !7, file: !1, line: 18, type: !10)
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!13 = !DILocation(line: 0, scope: !7)
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!14 = !DILocalVariable(name: "data", arg: 2, scope: !7, file: !1, line: 18, type: !11)
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!15 = !DILocalVariable(name: "i", scope: !7, file: !1, line: 19, type: !10)
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!16 = !DILocation(line: 22, column: 27, scope: !17)
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!17 = distinct !DILexicalBlock(scope: !7, file: !1, line: 21, column: 22)
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!18 = !DILocalVariable(name: "comp", scope: !17, file: !1, line: 22, type: !10)
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!19 = distinct !{!19, !20, !21, !22, !23}
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!20 = !DILocation(line: 21, column: 5, scope: !7)
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!21 = !DILocation(line: 25, column: 5, scope: !7)
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!22 = !{!"llvm.loop.mustprogress"}
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!23 = !{!"llvm.loop.vectorize.width", i32 1}
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