Matt Arsenault 894e53d6ac AMDGPU: Fix using SMRD instructions for argument loads in functions ...

These are not actually uniform values except in kernels.

llvm-svn: 309172

2017-07-26 20:39:42 +00:00

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AArch64

[AArch64] Add a test for float argument passing to win64 vararg functions

2017-07-25 19:57:22 +00:00

AMDGPU

AMDGPU: Fix using SMRD instructions for argument loads in functions

2017-07-26 20:39:42 +00:00

ARM

[ARM] GlobalISel: Map G_GLOBAL_VALUE to GPR

2017-07-26 11:01:13 +00:00

AVR

[AVR] Remove the instrumentation pass

2017-07-23 23:39:11 +00:00

BPF

[DAG] Fix typo preventing some stores merges to truncated stores.

2017-07-23 02:06:28 +00:00

Generic

[AVR] Add/remove XFAILs to get the backend passing Generic CodeGen tests

2017-07-16 23:33:50 +00:00

Hexagon

[Hexagon] Recognize C4_cmpneqi, C4_cmpltei and C4_cmplteui in NewValueJump

2017-07-24 19:35:48 +00:00

Inputs

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Lanai

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Mips

Fix endianness bug in DAGCombiner::visitTRUNCATE and visitEXTRACT_VECTOR_ELT

2017-07-25 09:40:35 +00:00

MIR

AMDGPU: Implement memory model

2017-07-21 21:19:23 +00:00

MSP430

[DAG] Improve Aliasing of operations to static alloca

2017-07-18 20:06:24 +00:00

Nios2

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NVPTX

[NVPTX] Add lowering of i128 params.

2017-07-20 21:16:03 +00:00

PowerPC

[PowerPC] Pretty-print CR bits the way the binutils disassembler does

2017-07-25 18:26:35 +00:00

SPARC

[SPARC] Clean up the support for disabling fsmuld and fmuls instructions.

2017-07-20 20:09:11 +00:00

SystemZ

[SystemZ] test update

2017-07-21 13:14:17 +00:00

Thumb

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Thumb2

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WebAssembly

Revert r308273 to reinstate part of r308100.

2017-07-19 04:15:30 +00:00

WinEH

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X86

This patch returns proper value to indicate the case when instruction throughput can't be calculated.

2017-07-26 18:55:14 +00:00

XCore

[DAG] Improve Aliasing of operations to static alloca

2017-07-18 20:06:24 +00:00